Lines Matching refs:DP83869_DEVADDR
20 #define DP83869_DEVADDR 0x1f
253 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
273 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
279 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
285 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
297 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
303 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
308 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
333 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG, val_rxcfg);
349 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG);
365 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
375 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
385 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR,
500 return phy_set_bits_mmd(phydev, DP83869_DEVADDR,
504 return phy_clear_bits_mmd(phydev, DP83869_DEVADDR,
514 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
567 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1);
628 ret = phy_modify_mmd(phydev, DP83869_DEVADDR,
706 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
735 ret = phy_modify_mmd(phydev, DP83869_DEVADDR, DP83869_OP_MODE,
741 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
753 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
774 ret = phy_write_mmd(phydev, DP83869_DEVADDR,
819 DP83869_DEVADDR, DP83869_IO_MUX_CFG,
825 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIIDCTL,
831 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL);
845 ret = phy_write_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL,