Lines Matching refs:dp83640
228 struct dp83640_private *dp83640 = phydev->priv;
231 if (dp83640->clock->page != page) {
233 dp83640->clock->page = page;
244 struct dp83640_private *dp83640 = phydev->priv;
246 if (dp83640->clock->page != page) {
248 dp83640->clock->page = page;
307 struct dp83640_private *dp83640 = clock->chosen;
308 struct phy_device *phydev = dp83640->phydev;
551 struct dp83640_private *dp83640 = phydev->priv;
552 struct dp83640_clock *clock = dp83640->clock;
599 static void prune_rx_ts(struct dp83640_private *dp83640)
604 list_for_each_safe(this, next, &dp83640->rxts) {
608 list_add(&rxts->list, &dp83640->rxpool);
742 static int decode_evnt(struct dp83640_private *dp83640,
770 dp83640->edata.sec_hi = phy_txts->sec_hi;
773 dp83640->edata.sec_lo = phy_txts->sec_lo;
776 dp83640->edata.ns_hi = phy_txts->ns_hi;
779 dp83640->edata.ns_lo = phy_txts->ns_lo;
788 event.timestamp = phy2txts(&dp83640->edata);
796 ptp_clock_event(dp83640->clock->ptp_clock, &event);
835 static void decode_rxts(struct dp83640_private *dp83640,
848 spin_lock_irqsave(&dp83640->rx_lock, flags);
850 prune_rx_ts(dp83640);
852 if (list_empty(&dp83640->rxpool)) {
856 rxts = list_first_entry(&dp83640->rxpool, struct rxts, list);
860 spin_lock(&dp83640->rx_queue.lock);
861 skb_queue_walk(&dp83640->rx_queue, skb) {
866 __skb_unlink(skb, &dp83640->rx_queue);
870 list_add(&rxts->list, &dp83640->rxpool);
874 spin_unlock(&dp83640->rx_queue.lock);
877 list_add_tail(&rxts->list, &dp83640->rxts);
879 spin_unlock_irqrestore(&dp83640->rx_lock, flags);
885 static void decode_txts(struct dp83640_private *dp83640,
896 skb = skb_dequeue(&dp83640->tx_queue);
907 skb = skb_dequeue(&dp83640->tx_queue);
923 static void decode_status_frame(struct dp83640_private *dp83640,
945 decode_rxts(dp83640, phy_rxts);
951 decode_txts(dp83640, phy_txts);
956 size = decode_evnt(dp83640, ptr, len, ests);
998 sprintf(clock->caps.name, "dp83640 timer");
1105 struct dp83640_private *dp83640 = phydev->priv;
1106 struct dp83640_clock *clock = dp83640->clock;
1212 struct dp83640_private *dp83640 =
1223 dp83640->hwts_tx_en = cfg.tx_type;
1227 dp83640->hwts_rx_en = 0;
1228 dp83640->layer = 0;
1229 dp83640->version = 0;
1234 dp83640->hwts_rx_en = 1;
1235 dp83640->layer = PTP_CLASS_L4;
1236 dp83640->version = PTP_CLASS_V1;
1242 dp83640->hwts_rx_en = 1;
1243 dp83640->layer = PTP_CLASS_L4;
1244 dp83640->version = PTP_CLASS_V2;
1250 dp83640->hwts_rx_en = 1;
1251 dp83640->layer = PTP_CLASS_L2;
1252 dp83640->version = PTP_CLASS_V2;
1258 dp83640->hwts_rx_en = 1;
1259 dp83640->layer = PTP_CLASS_L4 | PTP_CLASS_L2;
1260 dp83640->version = PTP_CLASS_V2;
1267 txcfg0 = (dp83640->version & TX_PTP_VER_MASK) << TX_PTP_VER_SHIFT;
1268 rxcfg0 = (dp83640->version & TX_PTP_VER_MASK) << TX_PTP_VER_SHIFT;
1270 if (dp83640->layer & PTP_CLASS_L2) {
1274 if (dp83640->layer & PTP_CLASS_L4) {
1279 if (dp83640->hwts_tx_en)
1282 if (dp83640->hwts_tx_en == HWTSTAMP_TX_ONESTEP_SYNC)
1285 if (dp83640->hwts_rx_en)
1288 mutex_lock(&dp83640->clock->extreg_lock);
1290 ext_write(0, dp83640->phydev, PAGE5, PTP_TXCFG0, txcfg0);
1291 ext_write(0, dp83640->phydev, PAGE5, PTP_RXCFG0, rxcfg0);
1293 mutex_unlock(&dp83640->clock->extreg_lock);
1300 struct dp83640_private *dp83640 =
1305 while ((skb = skb_dequeue(&dp83640->rx_queue))) {
1310 skb_queue_head(&dp83640->rx_queue, skb);
1317 if (!skb_queue_empty(&dp83640->rx_queue))
1318 schedule_delayed_work(&dp83640->ts_work, SKB_TIMESTAMP_TIMEOUT);
1324 struct dp83640_private *dp83640 =
1333 decode_status_frame(dp83640, skb);
1338 if (!dp83640->hwts_rx_en)
1341 if ((type & dp83640->version) == 0 || (type & dp83640->layer) == 0)
1344 spin_lock_irqsave(&dp83640->rx_lock, flags);
1345 prune_rx_ts(dp83640);
1346 list_for_each_safe(this, next, &dp83640->rxts) {
1353 list_add(&rxts->list, &dp83640->rxpool);
1357 spin_unlock_irqrestore(&dp83640->rx_lock, flags);
1362 skb_queue_tail(&dp83640->rx_queue, skb);
1363 schedule_delayed_work(&dp83640->ts_work, SKB_TIMESTAMP_TIMEOUT);
1375 struct dp83640_private *dp83640 =
1378 switch (dp83640->hwts_tx_en) {
1389 skb_queue_tail(&dp83640->tx_queue, skb);
1402 struct dp83640_private *dp83640 =
1409 info->phc_index = ptp_clock_index(dp83640->clock->ptp_clock);
1426 struct dp83640_private *dp83640;
1436 dp83640 = kzalloc(sizeof(struct dp83640_private), GFP_KERNEL);
1437 if (!dp83640)
1440 dp83640->phydev = phydev;
1441 dp83640->mii_ts.rxtstamp = dp83640_rxtstamp;
1442 dp83640->mii_ts.txtstamp = dp83640_txtstamp;
1443 dp83640->mii_ts.hwtstamp = dp83640_hwtstamp;
1444 dp83640->mii_ts.ts_info = dp83640_ts_info;
1446 INIT_DELAYED_WORK(&dp83640->ts_work, rx_timestamp_work);
1447 INIT_LIST_HEAD(&dp83640->rxts);
1448 INIT_LIST_HEAD(&dp83640->rxpool);
1450 list_add(&dp83640->rx_pool_data[i].list, &dp83640->rxpool);
1452 phydev->mii_ts = &dp83640->mii_ts;
1453 phydev->priv = dp83640;
1455 spin_lock_init(&dp83640->rx_lock);
1456 skb_queue_head_init(&dp83640->rx_queue);
1457 skb_queue_head_init(&dp83640->tx_queue);
1459 dp83640->clock = clock;
1462 clock->chosen = dp83640;
1470 list_add_tail(&dp83640->list, &clock->phylist);
1477 kfree(dp83640);
1488 struct dp83640_private *tmp, *dp83640 = phydev->priv;
1496 cancel_delayed_work_sync(&dp83640->ts_work);
1498 skb_queue_purge(&dp83640->rx_queue);
1499 skb_queue_purge(&dp83640->tx_queue);
1501 clock = dp83640_clock_get(dp83640->clock);
1503 if (dp83640 == clock->chosen) {
1509 if (tmp == dp83640) {
1517 kfree(dp83640);