Lines Matching refs:val

21 int __bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
29 return __phy_write(phydev, MII_BCM54XX_EXP_DATA, val);
33 int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val)
38 rc = __bcm_phy_write_exp(phydev, reg, val);
47 int val;
49 val = __phy_write(phydev, MII_BCM54XX_EXP_SEL, reg);
50 if (val < 0)
51 return val;
53 val = __phy_read(phydev, MII_BCM54XX_EXP_DATA);
58 return val;
117 int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val)
119 return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val);
124 u16 reg, u16 chl, u16 val)
141 rc = bcm_phy_write_exp(phydev, tmp, val);
250 u16 val)
255 MII_BCM54XX_SHD_DATA(val));
261 int val;
263 val = __phy_write(phydev, MII_BCM54XX_RDB_ADDR, rdb);
264 if (val < 0)
265 return val;
283 int __bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val)
291 return __phy_write(phydev, MII_BCM54XX_RDB_DATA, val);
295 int bcm_phy_write_rdb(struct phy_device *phydev, u16 rdb, u16 val)
300 ret = __bcm_phy_write_rdb(phydev, rdb, val);
341 int val;
344 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR3);
345 if (val < 0)
346 return val;
348 val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
349 bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR3, val);
352 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_APD);
353 if (val < 0)
354 return val;
357 val &= BCM_APD_CLR_MASK;
360 val |= BCM54XX_SHD_APD_EN;
362 val |= BCM_NO_ANEG_APD_EN;
365 val |= BCM_APD_SINGLELP_EN;
368 return bcm_phy_write_shadow(phydev, BCM54XX_SHD_APD, val);
374 int val, mask = 0;
377 val = phy_read_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL);
378 if (val < 0)
379 return val;
382 val |= LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X;
384 val &= ~(LPI_FEATURE_EN | LPI_FEATURE_EN_DIG1000X);
386 phy_write_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL, (u32)val);
389 val = phy_read_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV);
390 if (val < 0)
391 return val;
401 val |= mask;
403 val &= ~mask;
405 phy_write_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV, (u32)val);
413 int val;
415 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
416 if (val < 0)
417 return val;
420 if (!(val & MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN)) {
425 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR2);
426 if (val < 0)
427 return val;
430 if (val & BCM54XX_SHD_SCR2_WSPD_RTRY_DIS) {
434 val >>= BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;
435 val &= BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK;
436 *count = val + BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET;
445 int val = 0, ret = 0;
454 val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC);
455 if (val < 0)
456 return val;
459 val |= MII_BCM54XX_AUXCTL_MISC_WREN;
462 val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN;
465 val);
467 val |= MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN;
470 val);
475 val = bcm_phy_read_shadow(phydev, BCM54XX_SHD_SCR2);
476 val &= ~(BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK <<
482 val |= BCM54XX_SHD_SCR2_WSPD_RTRY_DIS;
485 val |= 1 << BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT;
488 val |= (count - BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET) <<
493 return bcm_phy_write_shadow(phydev, BCM54XX_SHD_SCR2, val);
538 int val;
542 val = phy_read(phydev, stat.reg);
544 val = phy_read_mmd(phydev, stat.devad, stat.reg);
545 if (val < 0) {
548 val >>= stat.shift;
549 val = val & ((1 << stat.bits) - 1);
550 shadow[i] += val;
719 int val;
721 val = __bcm_phy_read_exp(phydev,
723 if (val < 0)
724 return val;
726 if (val == BCM54XX_ECD_LENGTH_RESULTS_INVALID)
729 ethnl_cable_test_fault_length(phydev, pair, val);