Lines Matching defs:phydev

231 static u32 adin_get_reg_value(struct phy_device *phydev,
236 struct device *dev = &phydev->mdio.dev;
245 phydev_warn(phydev,
254 static int adin_config_rgmii_mode(struct phy_device *phydev)
259 if (!phy_interface_is_rgmii(phydev))
260 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
264 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG);
270 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
271 phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
274 val = adin_get_reg_value(phydev, "adi,rx-internal-delay-ps",
283 if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
284 phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
287 val = adin_get_reg_value(phydev, "adi,tx-internal-delay-ps",
296 return phy_write_mmd(phydev, MDIO_MMD_VEND1,
300 static int adin_config_rmii_mode(struct phy_device *phydev)
305 if (phydev->interface != PHY_INTERFACE_MODE_RMII)
306 return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1,
310 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG);
316 val = adin_get_reg_value(phydev, "adi,fifo-depth-bits",
323 return phy_write_mmd(phydev, MDIO_MMD_VEND1,
327 static int adin_get_downshift(struct phy_device *phydev, u8 *data)
331 val = phy_read(phydev, ADIN1300_PHY_CTRL2);
335 cnt = phy_read(phydev, ADIN1300_PHY_CTRL3);
347 static int adin_set_downshift(struct phy_device *phydev, u8 cnt)
353 return phy_clear_bits(phydev, ADIN1300_PHY_CTRL2,
361 rc = phy_modify(phydev, ADIN1300_PHY_CTRL3,
367 return phy_set_bits(phydev, ADIN1300_PHY_CTRL2,
371 static int adin_get_edpd(struct phy_device *phydev, u16 *tx_interval)
375 val = phy_read(phydev, ADIN1300_PHY_CTRL_STATUS2);
392 static int adin_set_edpd(struct phy_device *phydev, u16 tx_interval)
397 return phy_clear_bits(phydev, ADIN1300_PHY_CTRL_STATUS2,
414 return phy_modify(phydev, ADIN1300_PHY_CTRL_STATUS2,
419 static int adin_get_tunable(struct phy_device *phydev,
424 return adin_get_downshift(phydev, data);
426 return adin_get_edpd(phydev, data);
432 static int adin_set_tunable(struct phy_device *phydev,
437 return adin_set_downshift(phydev, *(const u8 *)data);
439 return adin_set_edpd(phydev, *(const u16 *)data);
445 static int adin_config_clk_out(struct phy_device *phydev)
447 struct device *dev = &phydev->mdio.dev;
461 phydev_err(phydev, "invalid adi,phy-output-clock\n");
468 return phy_modify_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_CLK_CFG_REG,
472 static int adin_config_init(struct phy_device *phydev)
476 phydev->mdix_ctrl = ETH_TP_MDI_AUTO;
478 rc = adin_config_rgmii_mode(phydev);
482 rc = adin_config_rmii_mode(phydev);
486 rc = adin_set_downshift(phydev, 4);
490 rc = adin_set_edpd(phydev, ETHTOOL_PHY_EDPD_DFLT_TX_MSECS);
494 rc = adin_config_clk_out(phydev);
498 phydev_dbg(phydev, "PHY is using mode '%s'\n",
499 phy_modes(phydev->interface));
504 static int adin_phy_ack_intr(struct phy_device *phydev)
507 int rc = phy_read(phydev, ADIN1300_INT_STATUS_REG);
512 static int adin_phy_config_intr(struct phy_device *phydev)
516 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
517 err = adin_phy_ack_intr(phydev);
521 err = phy_set_bits(phydev, ADIN1300_INT_MASK_REG,
524 err = phy_clear_bits(phydev, ADIN1300_INT_MASK_REG,
529 err = adin_phy_ack_intr(phydev);
535 static irqreturn_t adin_phy_handle_interrupt(struct phy_device *phydev)
539 irq_status = phy_read(phydev, ADIN1300_INT_STATUS_REG);
541 phy_error(phydev);
548 phy_trigger_machine(phydev);
553 static int adin_cl45_to_adin_reg(struct phy_device *phydev, int devad,
568 phydev_err(phydev,
575 static int adin_read_mmd(struct phy_device *phydev, int devad, u16 regnum)
577 struct mii_bus *bus = phydev->mdio.bus;
578 int phy_addr = phydev->mdio.addr;
582 adin_regnum = adin_cl45_to_adin_reg(phydev, devad, regnum);
594 static int adin_write_mmd(struct phy_device *phydev, int devad, u16 regnum,
597 struct mii_bus *bus = phydev->mdio.bus;
598 int phy_addr = phydev->mdio.addr;
602 adin_regnum = adin_cl45_to_adin_reg(phydev, devad, regnum);
614 static int adin_config_mdix(struct phy_device *phydev)
621 switch (phydev->mdix_ctrl) {
634 reg = phy_read(phydev, ADIN1300_PHY_CTRL1);
648 return phy_write(phydev, ADIN1300_PHY_CTRL1, reg);
651 static int adin_config_aneg(struct phy_device *phydev)
655 ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL1, ADIN1300_DIAG_CLK_EN);
659 ret = phy_set_bits(phydev, ADIN1300_PHY_CTRL3, ADIN1300_LINKING_EN);
663 ret = adin_config_mdix(phydev);
667 return genphy_config_aneg(phydev);
670 static int adin_mdix_update(struct phy_device *phydev)
676 reg = phy_read(phydev, ADIN1300_PHY_CTRL1);
686 phydev->mdix = ETH_TP_MDI_X;
688 phydev->mdix = ETH_TP_MDI;
697 reg = phy_read(phydev, ADIN1300_PHY_STATUS1);
704 phydev->mdix = ETH_TP_MDI_X;
706 phydev->mdix = ETH_TP_MDI;
711 static int adin_read_status(struct phy_device *phydev)
715 ret = adin_mdix_update(phydev);
719 return genphy_read_status(phydev);
722 static int adin_soft_reset(struct phy_device *phydev)
727 rc = phy_set_bits_mmd(phydev, MDIO_MMD_VEND1,
736 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1,
742 static int adin_get_sset_count(struct phy_device *phydev)
747 static void adin_get_strings(struct phy_device *phydev, u8 *data)
757 static int adin_read_mmd_stat_regs(struct phy_device *phydev,
763 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1);
772 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2);
782 static u64 adin_get_stat(struct phy_device *phydev, int i)
785 struct adin_priv *priv = phydev->priv;
790 ret = adin_read_mmd_stat_regs(phydev, stat, &val);
794 ret = phy_read(phydev, stat->reg1);
805 static void adin_get_stats(struct phy_device *phydev,
811 rc = phy_read(phydev, ADIN1300_RX_ERR_CNT);
816 data[i] = adin_get_stat(phydev, i);
819 static int adin_probe(struct phy_device *phydev)
821 struct device *dev = &phydev->mdio.dev;
828 phydev->priv = priv;
833 static int adin_cable_test_start(struct phy_device *phydev)
837 ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL3, ADIN1300_LINKING_EN);
841 ret = phy_clear_bits(phydev, ADIN1300_PHY_CTRL1, ADIN1300_DIAG_CLK_EN);
848 return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN,
874 static int adin_cable_test_report_pair(struct phy_device *phydev,
880 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1,
887 ret = ethnl_cable_test_result(phydev, pair, fault_rslt);
891 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1,
900 return ethnl_cable_test_fault_length(phydev, pair, ret * 100);
906 static int adin_cable_test_report(struct phy_device *phydev)
912 ret = adin_cable_test_report_pair(phydev, pair);
920 static int adin_cable_test_get_status(struct phy_device *phydev,
927 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN);
936 return adin_cable_test_report(phydev);