Lines Matching refs:ETH_PLL_CTL0
19 #define ETH_PLL_CTL0 0x44
75 val = readl(pll->base + ETH_PLL_CTL0);
85 u32 val = readl(pll->base + ETH_PLL_CTL0);
89 writel(val, pll->base + ETH_PLL_CTL0);
93 writel(val, pll->base + ETH_PLL_CTL0);
100 return readl_poll_timeout(pll->base + ETH_PLL_CTL0, val,
109 val = readl(pll->base + ETH_PLL_CTL0);
112 writel(val, pll->base + ETH_PLL_CTL0);
120 val = readl(pll->base + ETH_PLL_CTL0);
130 writel(0x29c0040a, pll->base + ETH_PLL_CTL0);
261 mux->reg = priv->regs + ETH_PLL_CTL0;