Lines Matching refs:channel_id
253 static void gsi_irq_ch_ctrl_enable(struct gsi *gsi, u32 channel_id)
255 u32 val = BIT(channel_id);
514 u32 channel_id = gsi_channel_id(channel);
520 val = ioread32(virt + reg_n_offset(reg, channel_id));
529 u32 channel_id = gsi_channel_id(channel);
537 gsi_irq_ch_ctrl_enable(gsi, channel_id);
540 val = reg_encode(reg, CH_CHID, channel_id);
551 opcode, channel_id, gsi_channel_state(channel));
555 static int gsi_channel_alloc_command(struct gsi *gsi, u32 channel_id)
557 struct gsi_channel *channel = &gsi->channel[channel_id];
565 channel_id, state);
577 channel_id, state);
676 static void gsi_channel_de_alloc_command(struct gsi *gsi, u32 channel_id)
678 struct gsi_channel *channel = &gsi->channel[channel_id];
685 channel_id, state);
696 channel_id, state);
828 u32 channel_id = gsi_channel_id(channel);
846 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
852 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
860 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
864 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
893 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
903 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
907 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
911 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
918 offset = reg_n_offset(reg, channel_id);
945 int gsi_channel_start(struct gsi *gsi, u32 channel_id)
947 struct gsi_channel *channel = &gsi->channel[channel_id];
1000 int gsi_channel_stop(struct gsi *gsi, u32 channel_id)
1002 struct gsi_channel *channel = &gsi->channel[channel_id];
1017 void gsi_channel_reset(struct gsi *gsi, u32 channel_id, bool doorbell)
1019 struct gsi_channel *channel = &gsi->channel[channel_id];
1037 int gsi_channel_suspend(struct gsi *gsi, u32 channel_id)
1039 struct gsi_channel *channel = &gsi->channel[channel_id];
1053 int gsi_channel_resume(struct gsi *gsi, u32 channel_id)
1055 struct gsi_channel *channel = &gsi->channel[channel_id];
1074 struct gsi_channel *channel = &trans->gsi->channel[trans->channel_id];
1085 u32 channel_id = trans->channel_id;
1091 channel = &gsi->channel[channel_id];
1098 ipa_gsi_channel_tx_queued(gsi, channel_id, trans_count, byte_count);
1118 u32 channel_id = trans->channel_id;
1124 channel = &gsi->channel[channel_id];
1131 ipa_gsi_channel_tx_completed(gsi, channel_id, trans_count, byte_count);
1147 u32 channel_id = __ffs(channel_mask);
1149 channel_mask ^= BIT(channel_id);
1178 gsi_isr_glob_chan_err(struct gsi *gsi, u32 err_ee, u32 channel_id, u32 code)
1181 dev_err(gsi->dev, "channel %u out of resources\n", channel_id);
1188 channel_id, err_ee, code);
1197 u32 channel_id = gsi_channel_id(evt_ring->channel);
1201 channel_id);
1440 u32 channel_id = event->chid;
1446 channel = &gsi->channel[channel_id];
1447 if (WARN(!channel->gsi, "event has bad channel %u\n", channel_id))
1456 if (WARN(!trans, "channel %u event with no transaction\n", channel_id))
1591 u32 channel_id = gsi_channel_id(channel);
1599 iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id));
1711 static int gsi_channel_setup_one(struct gsi *gsi, u32 channel_id)
1713 struct gsi_channel *channel = &gsi->channel[channel_id];
1726 ret = gsi_channel_alloc_command(gsi, channel_id);
1749 static void gsi_channel_teardown_one(struct gsi *gsi, u32 channel_id)
1751 struct gsi_channel *channel = &gsi->channel[channel_id];
1759 gsi_channel_de_alloc_command(gsi, channel_id);
1768 static int gsi_generic_command(struct gsi *gsi, u32 channel_id,
1801 val |= reg_encode(reg, GENERIC_CHID, channel_id);
1816 opcode, channel_id);
1821 static int gsi_modem_channel_alloc(struct gsi *gsi, u32 channel_id)
1823 return gsi_generic_command(gsi, channel_id,
1827 static void gsi_modem_channel_halt(struct gsi *gsi, u32 channel_id)
1833 ret = gsi_generic_command(gsi, channel_id,
1839 ret, channel_id);
1844 gsi_modem_channel_flow_control(struct gsi *gsi, u32 channel_id, bool enable)
1859 ret = gsi_generic_command(gsi, channel_id, command, 0);
1865 ret, enable ? "en" : "dis", channel_id);
1871 u32 channel_id = 0;
1880 ret = gsi_channel_setup_one(gsi, channel_id);
1883 } while (++channel_id < gsi->channel_count);
1886 while (channel_id < GSI_CHANNEL_COUNT_MAX) {
1887 struct gsi_channel *channel = &gsi->channel[channel_id++];
1894 channel_id - 1);
1895 channel_id = gsi->channel_count;
1920 channel_id = __fls(mask);
1922 mask ^= BIT(channel_id);
1924 gsi_modem_channel_halt(gsi, channel_id);
1928 while (channel_id--)
1929 gsi_channel_teardown_one(gsi, channel_id);
1942 u32 channel_id;
1947 channel_id = __fls(mask);
1949 mask ^= BIT(channel_id);
1951 gsi_modem_channel_halt(gsi, channel_id);
1954 channel_id = gsi->channel_count - 1;
1956 gsi_channel_teardown_one(gsi, channel_id);
1957 while (channel_id--);
2155 u32 channel_id = data->channel_id;
2159 if (channel_id >= GSI_CHANNEL_COUNT_MAX) {
2161 channel_id, GSI_CHANNEL_COUNT_MAX);
2171 dev_err(dev, "command channel %u is not TX\n", channel_id);
2180 channel_id, channel_data->tlv_count, GSI_TLV_MAX);
2186 channel_id, IPA_COMMAND_TRANS_TRE_MAX,
2198 channel_id, channel_data->tlv_count,
2205 channel_id, channel_data->tre_count);
2211 channel_id, channel_data->event_count);
2234 data->channel_id, tre_count);
2239 channel = &gsi->channel[data->channel_id];
2256 ret, data->channel_id);
2260 ret = gsi_channel_trans_init(gsi, data->channel_id);
2265 u32 tre_max = gsi_channel_tre_max(gsi, data->channel_id);
2321 BIT(data[i].channel_id);
2337 gsi->modem_channel_bitmap &= ~BIT(data[i].channel_id);
2340 gsi_channel_exit_one(&gsi->channel[data->channel_id]);
2349 u32 channel_id = GSI_CHANNEL_COUNT_MAX - 1;
2352 gsi_channel_exit_one(&gsi->channel[channel_id]);
2353 while (channel_id--);
2425 u32 gsi_channel_tre_max(struct gsi *gsi, u32 channel_id)
2427 struct gsi_channel *channel = &gsi->channel[channel_id];