Lines Matching refs:val
526 void *val, size_t val_size)
530 return spi_write_then_read(spi, reg, reg_size, val, val_size);
544 u8 val = BIT_TXNTRIG;
548 val |= BIT_TXNSECEN;
551 val |= BIT_TXNACKREQ;
555 devrec->tx_post_buf[1] = val;
635 u8 val;
645 val = (channel - 11) << RFCON0_CH_SHIFT | RFOPT_RECOMMEND;
647 RFCON0_CH_MASK, val);
716 u8 val;
720 val = BIT_PANCOORD;
722 val = 0;
724 BIT_PANCOORD, val);
838 u8 val;
841 val = min_be << TXMCR_MIN_BE_SHIFT;
843 val |= retries << TXMCR_CSMA_RETRIES_SHIFT;
847 val);
854 u8 val;
859 val = 2;
862 val = 1;
867 val = 3;
879 val << BBREG2_CCA_MODE_SHIFT);
934 u8 val;
937 val = TXPWRL_0 << TXPWRL_SHIFT;
940 val = TXPWRL_10 << TXPWRL_SHIFT;
943 val = TXPWRL_20 << TXPWRL_SHIFT;
946 val = TXPWRL_30 << TXPWRL_SHIFT;
954 val |= (TXPWRS_0 << TXPWRS_SHIFT);
957 val |= (TXPWRS_0_5 << TXPWRS_SHIFT);
960 val |= (TXPWRS_1_2 << TXPWRS_SHIFT);
963 val |= (TXPWRS_1_9 << TXPWRS_SHIFT);
966 val |= (TXPWRS_2_8 << TXPWRS_SHIFT);
969 val |= (TXPWRS_3_7 << TXPWRS_SHIFT);
972 val |= (TXPWRS_4_9 << TXPWRS_SHIFT);
975 val |= (TXPWRS_6_3 << TXPWRS_SHIFT);
982 TXPWRL_MASK | TXPWRS_MASK, val);