Lines Matching refs:regmap_dar
401 struct regmap *regmap_dar;
501 ret = regmap_write(lp->regmap_dar, DAR_PLL_INT0, PLL_INT[channel - 11]);
504 ret = regmap_write(lp->regmap_dar, DAR_PLL_FRAC0_LSB, 0x00);
507 ret = regmap_write(lp->regmap_dar, DAR_PLL_FRAC0_MSB,
525 ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,
534 ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL2,
541 ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,
557 regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,
598 regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,
601 regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,
626 return regmap_write(lp->regmap_dar, DAR_PA_PWR,
672 ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,
727 ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,
738 ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL4,
775 regmap_update_bits_async(lp->regmap_dar, DAR_PHY_CTRL1,
938 regmap_update_bits_async(lp->regmap_dar, DAR_PHY_CTRL1,
1096 ret = regmap_write(lp->regmap_dar, DAR_IRQ_STS1, 0xEF);
1101 ret = regmap_write(lp->regmap_dar, DAR_IRQ_STS2,
1108 ret = regmap_write(lp->regmap_dar, DAR_IRQ_STS3, 0xFF);
1113 ret = regmap_update_bits(lp->regmap_dar, DAR_PHY_CTRL1,
1117 ret = regmap_write(lp->regmap_dar, DAR_PHY_CTRL2, 0xFF);
1122 ret = regmap_write(lp->regmap_dar, DAR_PHY_CTRL3,
1131 ret = regmap_write(lp->regmap_dar, DAR_SRC_CTRL,
1151 ret = regmap_write(lp->regmap_dar, DAR_OVERWRITE_VER,
1169 ret = regmap_write(lp->regmap_dar, DAR_SRC_CTRL, phy_reg);
1201 ret = regmap_update_bits(lp->regmap_dar, DAR_PWR_MODES,
1208 ret = regmap_update_bits(lp->regmap_dar, DAR_CLK_OUT_CTRL,
1276 lp->regmap_dar = devm_regmap_init_spi(spi, &mcr20a_dar_regmap);
1277 if (IS_ERR(lp->regmap_dar)) {
1278 ret = PTR_ERR(lp->regmap_dar);