Lines Matching refs:cas_ctl
676 * @cas_ctl: Pointer to the cas_control object for the relevant spi transfer
681 static void ca8210_rx_done(struct cas_control *cas_ctl)
686 struct ca8210_priv *priv = cas_ctl->priv;
688 buf = cas_ctl->tx_in_buf;
801 struct cas_control *cas_ctl = context;
802 struct ca8210_priv *priv = cas_ctl->priv;
808 cas_ctl->tx_in_buf[0] == SPI_NACK ||
809 (cas_ctl->tx_in_buf[0] == SPI_IDLE &&
810 cas_ctl->tx_in_buf[1] == SPI_NACK)
814 if (cas_ctl->tx_buf[0] == SPI_IDLE) {
819 kfree(cas_ctl);
824 kfree(cas_ctl);
828 memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE);
829 kfree(cas_ctl);
839 cas_ctl->tx_in_buf[0] != SPI_IDLE &&
840 cas_ctl->tx_in_buf[0] != SPI_NACK
847 for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++)
851 cas_ctl->tx_in_buf[i]
853 ca8210_rx_done(cas_ctl);
856 kfree(cas_ctl);
876 struct cas_control *cas_ctl;
888 cas_ctl = kzalloc(sizeof(*cas_ctl), GFP_ATOMIC);
889 if (!cas_ctl)
892 cas_ctl->priv = priv;
893 memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
894 memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
895 memcpy(cas_ctl->tx_buf, buf, len);
898 dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]);
900 spi_message_init(&cas_ctl->msg);
902 cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */
903 cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */
904 cas_ctl->transfer.speed_hz = 0; /* Use device setting */
905 cas_ctl->transfer.bits_per_word = 0; /* Use device setting */
906 cas_ctl->transfer.tx_buf = cas_ctl->tx_buf;
907 cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf;
908 cas_ctl->transfer.delay.value = 0;
909 cas_ctl->transfer.delay.unit = SPI_DELAY_UNIT_USECS;
910 cas_ctl->transfer.cs_change = 0;
911 cas_ctl->transfer.len = sizeof(struct mac_message);
912 cas_ctl->msg.complete = ca8210_spi_transfer_complete;
913 cas_ctl->msg.context = cas_ctl;
916 &cas_ctl->transfer,
917 &cas_ctl->msg
920 status = spi_async(spi, &cas_ctl->msg);