Lines Matching refs:SDLC
58 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */
79 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */
91 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */
100 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */
102 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */
119 #define LOOPMODE 2 /* SDLC Loop mode */
120 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */
197 #define END_FR 0x80 /* End of Frame (SDLC) */
225 /* Write Register 7' (SDLC/HDLC Programmable Enhancements) */
229 #define TXDNRZI 0x08 /* TxD Pulled High in SDLC NRZI mode */
237 #define SHDLCE 1 /* SDLC/HDLC Enhancements Enable */