Lines Matching defs:hdlctx
190 } hdlctx;
367 if (bc->hdlctx.bufcnt > 0)
374 wp = bc->hdlctx.buf;
412 bc->hdlctx.bufptr = bc->hdlctx.buf;
413 bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
426 if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
427 bc->hdlctx.state = tx_idle;
428 if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
429 if (bc->hdlctx.bufcnt <= 0)
431 if (bc->hdlctx.bufcnt <= 0)
435 bc->hdlctx.slotcnt = bc->ch_params.slottime;
438 if ((--bc->hdlctx.slotcnt) > 0)
440 bc->hdlctx.slotcnt = bc->ch_params.slottime;
445 if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
446 bc->hdlctx.state = tx_keyup;
447 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
451 switch (bc->hdlctx.state) {
453 i = min_t(int, cnt, bc->hdlctx.flags);
455 bc->hdlctx.flags -= i;
456 if (bc->hdlctx.flags <= 0)
457 bc->hdlctx.state = tx_data;
468 if (bc->hdlctx.bufcnt <= 0) {
470 if (bc->hdlctx.bufcnt <= 0) {
471 bc->hdlctx.state = tx_tail;
472 bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
476 i = min_t(int, cnt, bc->hdlctx.bufcnt);
477 bc->hdlctx.bufcnt -= i;
479 if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
481 bc->hdlctx.bufptr += i;
486 if (bc->hdlctx.bufcnt > 0) {
487 bc->hdlctx.state = tx_data;
490 i = min_t(int, cnt, bc->hdlctx.flags);
493 bc->hdlctx.flags -= i;
506 if (bc->hdlctx.calibrate <= 0)
508 i = min_t(int, cnt, bc->hdlctx.calibrate);
510 bc->hdlctx.calibrate -= i;
925 bc->hdlctx.state = tx_idle;
926 bc->hdlctx.bufcnt = 0;
927 bc->hdlctx.slotcnt = bc->ch_params.slottime;
928 bc->hdlctx.calibrate = 0;
1033 bc->hdlctx.slotcnt = 1;
1073 bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;