Lines Matching defs:epidx
174 int epidx;
180 for (epidx = 0; epidx < hw->max_epid; epidx++) {
181 hw->ep_shm_info[epidx].es_status =
182 hw->hw_info.res_buf->info.info[epidx].es_status;
183 hw->ep_shm_info[epidx].zone =
184 hw->hw_info.res_buf->info.info[epidx].zone;
197 for (epidx = 0; epidx < (hw->max_epid); epidx++) {
198 if ((epidx != hw->my_epid) &&
199 (hw->ep_shm_info[epidx].es_status ==
201 fjes_hw_raise_interrupt(hw, epidx,
203 hw->ep_shm_info[epidx].ep_stats
210 for (epidx = 0; epidx < (hw->max_epid); epidx++) {
211 if (epidx == hw->my_epid)
214 buf_pair = &hw->ep_shm_info[epidx];
221 if (fjes_hw_epid_is_same_zone(hw, epidx)) {
224 fjes_hw_register_buff_addr(hw, epidx, buf_pair);
237 hw->ep_shm_info[epidx].ep_stats
436 int epidx;
438 for (epidx = 0; epidx < hw->max_epid; epidx++) {
439 if (epidx == hw->my_epid)
443 result = fjes_hw_unregister_buff_addr(hw, epidx);
446 hw->ep_shm_info[epidx].ep_stats.com_unregist_buf_exec += 1;
451 buf_pair = &hw->ep_shm_info[epidx];
458 clear_bit(epidx, &hw->txrx_stop_req_bit);
530 int epidx;
540 for (epidx = 0; epidx < hw->max_epid; epidx++) {
541 if (epidx == hw->my_epid)
544 if (fjes_hw_get_partner_ep_status(hw, epidx) ==
546 adapter->hw.ep_shm_info[epidx]
778 int idx, epidx;
796 for (epidx = 0; epidx < hw->max_epid; epidx++) {
797 if (epidx == hw->my_epid)
799 hw->ep_shm_info[epidx].tx.info->v1i.rx_status &=
817 for (epidx = 0; epidx < hw->max_epid; epidx++) {
818 if (epidx == hw->my_epid)
822 fjes_hw_setup_epbuf(&hw->ep_shm_info[epidx].tx,
826 hw->ep_shm_info[epidx].tx.info->v1i.rx_status |=
964 int epidx;
969 for (epidx = 0; epidx < hw->max_epid; epidx++) {
970 if (epidx == hw->my_epid)
973 if (fjes_hw_get_partner_ep_status(hw, epidx) ==
975 adapter->hw.ep_shm_info[epidx]
1036 for (epidx = 0; epidx < hw->max_epid; epidx++) {
1037 if (epidx == hw->my_epid)
1039 if (fjes_hw_get_partner_ep_status(hw, epidx) ==
1041 adapter->hw.ep_shm_info[epidx].tx
1189 int max_epid, my_epid, epidx;
1205 for (epidx = 0; epidx < max_epid; epidx++) {
1206 if (epidx == my_epid)
1210 epidx);
1212 stop_req = test_bit(epidx, &hw->txrx_stop_req_bit);
1214 stop_req_done = hw->ep_shm_info[epidx].rx.info->v1i.rx_status &
1217 unshare_watch = test_bit(epidx, &unshare_watch_bitmask);
1219 unshare_reserve = test_bit(epidx,
1228 ret = fjes_hw_unregister_buff_addr(hw, epidx);
1244 hw->ep_shm_info[epidx].ep_stats
1248 fjes_hw_setup_epbuf(&hw->ep_shm_info[epidx].tx,
1252 clear_bit(epidx, &hw->txrx_stop_req_bit);
1253 clear_bit(epidx, &unshare_watch_bitmask);
1254 clear_bit(epidx,
1263 for (epidx = 0; epidx < max_epid; epidx++) {
1264 if (epidx == my_epid)
1267 if (test_bit(epidx,
1271 ret = fjes_hw_unregister_buff_addr(hw, epidx);
1288 hw->ep_shm_info[epidx].ep_stats
1293 &hw->ep_shm_info[epidx].tx,
1298 clear_bit(epidx, &hw->txrx_stop_req_bit);
1299 clear_bit(epidx, &unshare_watch_bitmask);
1300 clear_bit(epidx, &hw->hw_info.buffer_unshare_reserve_bit);
1303 if (test_bit(epidx, &unshare_watch_bitmask)) {
1305 hw->ep_shm_info[epidx].tx.info->v1i.rx_status &=