Lines Matching refs:mac_regs
88 void *addr = vptr->mac_regs;
104 static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
131 static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
149 static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
175 static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
199 static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
230 static void mac_wol_reset(struct mac_regs __iomem *regs)
506 struct mac_regs __iomem *regs = vptr->mac_regs;
568 struct mac_regs __iomem *regs = vptr->mac_regs;
627 static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
647 static void enable_mii_autopoll(struct mac_regs __iomem *regs)
679 static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
712 static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
757 static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
799 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
800 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
804 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
805 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
809 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
810 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
814 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
815 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
830 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs))
831 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
833 MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs);
836 static u32 check_connection_type(struct mac_regs __iomem *regs)
881 struct mac_regs __iomem *regs = vptr->mac_regs;
883 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
889 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
899 MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
900 MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
901 MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs);
943 velocity_mii_read(vptr->mac_regs, MII_CTRL1000, &CTRL1000);
949 velocity_mii_write(vptr->mac_regs, MII_CTRL1000, CTRL1000);
956 /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */
957 velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
970 velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
973 /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */
975 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
976 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
1057 struct mac_regs __iomem *regs = vptr->mac_regs;
1108 struct mac_regs __iomem *regs = vptr->mac_regs;
1139 struct mac_regs __iomem *regs = vptr->mac_regs;
1192 MII_ADVERTISE, vptr->mac_regs);
1195 vptr->mac_regs);
1198 vptr->mac_regs);
1199 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
1205 MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1212 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1214 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1218 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
1225 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1232 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1234 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
1242 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1246 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
1251 velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR);
1254 velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR);
1278 writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
1279 writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
1292 struct mac_regs __iomem *regs = vptr->mac_regs;
1331 struct mac_regs __iomem *regs = vptr->mac_regs;
1448 struct mac_regs __iomem *regs = vptr->mac_regs;
1824 struct mac_regs __iomem *regs = vptr->mac_regs;
1837 struct mac_regs __iomem *regs = vptr->mac_regs;
1896 mac_rx_queue_wake(vptr->mac_regs);
2173 mac_enable_int(vptr->mac_regs);
2197 isr_status = mac_read_isr(vptr->mac_regs);
2206 mac_write_isr(vptr->mac_regs, isr_status);
2209 mac_disable_int(vptr->mac_regs);
2256 mac_enable_int(vptr->mac_regs);
2273 struct mac_regs __iomem *regs = vptr->mac_regs;
2347 mac_enable_int(vptr->mac_regs);
2391 struct mac_regs __iomem *regs = vptr->mac_regs;
2401 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2406 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2408 check_connection_type(vptr->mac_regs);
2624 mac_tx_queue_wake(vptr->mac_regs, qnum);
2746 struct mac_regs __iomem *regs = vptr->mac_regs;
2767 struct mac_regs __iomem *regs;
2817 vptr->mac_regs = regs;
2844 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
2902 iounmap(vptr->mac_regs);
3015 struct mac_regs __iomem *regs = vptr->mac_regs;
3070 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
3072 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
3076 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
3110 struct mac_regs __iomem *regs = vptr->mac_regs;
3170 struct mac_regs __iomem *regs = vptr->mac_regs;
3212 mac_wol_reset(vptr->mac_regs);
3217 mac_disable_int(vptr->mac_regs);
3223 mac_tx_queue_wake(vptr->mac_regs, i);
3226 mac_enable_int(vptr->mac_regs);
3299 struct mac_regs __iomem *regs = vptr->mac_regs;
3303 status = check_connection_type(vptr->mac_regs);
3379 curr_status = check_connection_type(vptr->mac_regs);
3566 mac_disable_int(vptr->mac_regs);
3570 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3571 mac_clear_isr(vptr->mac_regs);
3572 mac_enable_int(vptr->mac_regs);