Lines Matching refs:READ_REG
202 u32 link = READ_REG(priv, regMAC_LNK_STAT) & MAC_LINK_STAT;
258 isr = (READ_REG(priv, regISR) & IR_RUN);
280 READ_REG(priv, regTXF_WPTR_0);
281 READ_REG(priv, regRXD_WPTR_0);
328 master = READ_REG(priv, regINIT_SEMAPHORE);
329 if (!READ_REG(priv, regINIT_STATUS) && master) {
337 if (READ_REG(priv, regINIT_STATUS)) {
354 READ_REG(priv, regVPC),
355 READ_REG(priv, regVIC),
356 READ_REG(priv, regINIT_STATUS), i);
370 READ_REG(priv, regUNC_MAC0_A),
371 READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));
381 READ_REG(priv, regUNC_MAC0_A),
382 READ_REG(priv, regUNC_MAC1_A), READ_REG(priv, regUNC_MAC2_A));
482 val = READ_REG(priv, regCLKPLL);
485 val = READ_REG(priv, regCLKPLL);
490 if ((READ_REG(priv, regCLKPLL) & CLKPLL_LKD) == CLKPLL_LKD) {
492 READ_REG(priv, regRXD_CFG0_0);
514 if (READ_REG(priv, regRST_PORT) & 1)
525 READ_REG(priv, regISR);
533 DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);
548 DBG("%x = %x\n", i, READ_REG(priv, i) & TXF_WPTR_WR_PTR);
670 data[2] = READ_REG(priv, data[1]);
713 val = READ_REG(priv, reg);
810 val = READ_REG(priv, reg);
846 macAddress[2] = READ_REG(priv, regUNC_MAC0_A);
847 macAddress[2] = READ_REG(priv, regUNC_MAC0_A);
848 macAddress[1] = READ_REG(priv, regUNC_MAC1_A);
849 macAddress[1] = READ_REG(priv, regUNC_MAC1_A);
850 macAddress[0] = READ_REG(priv, regUNC_MAC2_A);
851 macAddress[0] = READ_REG(priv, regUNC_MAC2_A);
864 val = READ_REG(priv, reg);
865 val |= ((u64) READ_REG(priv, reg + 8)) << 32;
1208 f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_WR_PTR;
1567 f->m.rptr = READ_REG(priv, f->m.reg_RPTR) & TXF_WPTR_WR_PTR;
1703 f->m.wptr = READ_REG(priv, f->m.reg_WPTR) & TXF_WPTR_MASK;