Lines Matching defs:comm
28 struct spl2sw_common *comm = mac->comm;
33 comm->enable |= mac->lan_port;
35 spl2sw_mac_hw_start(comm);
38 mask = readl(comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
40 writel(mask, comm->l2sw_reg_base + L2SW_SW_INT_MASK_0);
52 struct spl2sw_common *comm = mac->comm;
56 comm->enable &= ~mac->lan_port;
60 spl2sw_mac_hw_stop(comm);
69 struct spl2sw_common *comm = mac->comm;
78 if (unlikely(comm->tx_desc_full == 1)) {
92 mapping = dma_map_single(&comm->pdev->dev, skb->data,
94 if (dma_mapping_error(&comm->pdev->dev, mapping)) {
100 spin_lock_irqsave(&comm->tx_lock, flags);
102 tx_pos = comm->tx_pos;
103 txdesc = &comm->tx_desc[tx_pos];
104 skbinfo = &comm->tx_temp_skb_info[tx_pos];
125 if (unlikely(tx_pos == comm->tx_done_pos)) {
127 comm->tx_desc_full = 1;
129 comm->tx_pos = tx_pos;
133 writel(MAC_TRIG_L_SOC0, comm->l2sw_reg_base + L2SW_CPU_TX_TRIG);
135 spin_unlock_irqrestore(&comm->tx_lock, flags);
171 struct spl2sw_common *comm = mac->comm;
178 spin_lock_irqsave(&comm->tx_lock, flags);
181 if (comm->ndev[i])
182 netif_stop_queue(comm->ndev[i]);
184 spl2sw_mac_soft_reset(comm);
188 if (comm->ndev[i]) {
189 netif_trans_update(comm->ndev[i]);
190 netif_wake_queue(comm->ndev[i]);
193 spin_unlock_irqrestore(&comm->tx_lock, flags);
324 struct spl2sw_common *comm;
336 comm = devm_kzalloc(&pdev->dev, sizeof(*comm), GFP_KERNEL);
337 if (!comm)
340 comm->pdev = pdev;
341 platform_set_drvdata(pdev, comm);
343 spin_lock_init(&comm->tx_lock);
344 spin_lock_init(&comm->mdio_lock);
345 spin_lock_init(&comm->int_mask_lock);
348 comm->l2sw_reg_base = devm_platform_ioremap_resource(pdev, 0);
349 if (IS_ERR(comm->l2sw_reg_base))
350 return PTR_ERR(comm->l2sw_reg_base);
359 comm->clk = devm_clk_get(&pdev->dev, NULL);
360 if (IS_ERR(comm->clk)) {
361 dev_err_probe(&pdev->dev, PTR_ERR(comm->clk),
363 return PTR_ERR(comm->clk);
367 comm->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
368 if (IS_ERR(comm->rstc)) {
369 dev_err_probe(&pdev->dev, PTR_ERR(comm->rstc),
371 return PTR_ERR(comm->rstc);
375 ret = clk_prepare_enable(comm->clk);
381 reset_control_assert(comm->rstc);
383 reset_control_deassert(comm->rstc);
388 dev_name(&pdev->dev), comm);
395 ret = spl2sw_descs_init(comm);
398 spl2sw_descs_free(comm);
403 spl2sw_mac_init(comm);
406 ret = spl2sw_mdio_init(comm);
456 comm->ndev[i] = ndev;
460 mac->comm = comm;
476 if (comm->ndev[i])
486 ndev = comm->ndev[i];
488 ret = spl2sw_phy_connect(comm);
495 netif_napi_add(ndev, &comm->rx_napi, spl2sw_rx_poll);
496 napi_enable(&comm->rx_napi);
497 netif_napi_add_tx(ndev, &comm->tx_napi, spl2sw_tx_poll);
498 napi_enable(&comm->tx_napi);
503 if (comm->ndev[i])
504 unregister_netdev(comm->ndev[i]);
507 spl2sw_mdio_remove(comm);
510 clk_disable_unprepare(comm->clk);
516 struct spl2sw_common *comm;
519 comm = platform_get_drvdata(pdev);
521 spl2sw_phy_remove(comm);
525 if (comm->ndev[i])
526 unregister_netdev(comm->ndev[i]);
528 comm->enable = 0;
529 spl2sw_mac_hw_stop(comm);
530 spl2sw_descs_free(comm);
533 napi_disable(&comm->rx_napi);
534 netif_napi_del(&comm->rx_napi);
535 napi_disable(&comm->tx_napi);
536 netif_napi_del(&comm->tx_napi);
538 spl2sw_mdio_remove(comm);
540 clk_disable_unprepare(comm->clk);