Lines Matching refs:hme_read32
210 #define hme_read32(__hp, __reg) \
223 #define hme_read32(__hp, __reg) \
240 #define hme_read32(__hp, __reg) \
275 ret = hme_read32(hp, tregs + TCVR_CFG);
291 retval = hme_read32(hp, tregs + TCVR_CFG);
410 while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
416 retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
441 while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
566 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
568 while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
573 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
578 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
582 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
909 while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
929 while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
951 while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
967 stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
970 stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
973 stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
976 stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
979 (hme_read32(hp, bregs + BMAC_EXCTR) +
980 hme_read32(hp, bregs + BMAC_LTCTR));
997 tconfig = hme_read32(hp, tregs + TCVR_CFG);
1088 unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1089 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1288 hme_read32(hp, tregs + TCVR_CFG));
1290 hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1293 hme_read32(hp, tregs + TCVR_CFG));
1295 hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1386 if (hme_read32(hp, erxregs + ERX_RING) !=
1435 hme_read32(hp, gregs + GREG_CFG), bursts);
1444 hme_read32(hp, etxregs + ETX_RSIZE));
1448 HMD("tx dma enable old[%08x]\n", hme_read32(hp, etxregs + ETX_CFG));
1450 hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1458 hme_read32(hp, erxregs + ERX_CFG));
1460 regtmp = hme_read32(hp, erxregs + ERX_CFG);
1462 if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1473 hme_read32(hp, bregs + BMAC_RXCFG));
1507 HMD("XIF config old[%08x]\n", hme_read32(hp, bregs + BMAC_XIFCFG));
1512 hme_read32(hp, bregs + BMAC_TXCFG),
1513 hme_read32(hp, bregs + BMAC_RXCFG));
1520 hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1522 hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1541 hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1544 hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1867 u32 happy_status = hme_read32(hp, hp->gregs + GREG_STAT);
1941 hme_read32(hp, hp->gregs + GREG_STAT),
1942 hme_read32(hp, hp->etxregs + ETX_CFG),
1943 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2101 hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);