Lines Matching refs:addr
431 accessed w/ FIFO addr
527 * offset from base addr completion # byte
971 Batching FIFO addr */
1008 * one of 64 79-bit locations in the RX Reassembly DMA table and the addr of
1074 /* access to RX Instruction RAM. 5-bit register/counter holds addr
1446 addr will be passed up
1551 * 0 16 MSB of primary MAC addr [47:32] of DA field
1554 * 3*x 16MSB of alt MAC addr 1-15 [47:32] of DA field
1557 * 42 16 MSB of MAC CTRL addr [47:32] of DA.
1560 * MAC CTRL addr must be the reserved multicast addr for MAC CTRL frames.
1566 * primary addr reg 2 reg 1 reg 0
1567 * alt addr 1 reg 5 reg 4 reg 3
1568 * alt addr x reg 5*x reg 4*x reg 3*x
1569 * ctrl addr reg 44 reg 43 reg 42
1691 addr */
1695 addr of register
2878 #define CAS_ALIGN(addr, align) \
2879 (((unsigned long) (addr) + ((align) - 1UL)) & ~((align) - 1))