Lines Matching refs:ret
273 int ret = 0;
285 ret |= !corr;
292 ret |= !corr;
299 ret |= !corr;
302 return ret;
355 int ret, i;
362 ret = readl_poll_timeout(ioaddr + MTL_RXP_IACC_CTRL_STATUS,
364 if (ret)
365 return ret;
384 ret = readl_poll_timeout(ioaddr + MTL_RXP_IACC_CTRL_STATUS,
386 if (ret)
387 return ret;
437 int i, ret, nve = 0;
447 ret = dwmac5_rxp_disable(ioaddr);
448 if (ret)
474 ret = dwmac5_rxp_update_single_entry(ioaddr, entry, nve);
475 if (ret)
482 ret = dwmac5_rxp_update_single_entry(ioaddr, frag, nve);
483 if (ret)
499 ret = dwmac5_rxp_update_single_entry(ioaddr, entry, nve);
500 if (ret)
517 return ret;
597 int i, ret = 0x0;
600 ret |= dwmac5_est_write(ioaddr, BTR_LOW, cfg->btr[0], false);
601 ret |= dwmac5_est_write(ioaddr, BTR_HIGH, cfg->btr[1], false);
602 ret |= dwmac5_est_write(ioaddr, TER, cfg->ter, false);
603 ret |= dwmac5_est_write(ioaddr, LLR, cfg->gcl_size, false);
604 ret |= dwmac5_est_write(ioaddr, CTR_LOW, cfg->ctr[0], false);
605 ret |= dwmac5_est_write(ioaddr, CTR_HIGH, cfg->ctr[1], false);
606 if (ret)
607 return ret;
610 ret = dwmac5_est_write(ioaddr, i, cfg->gcl[i], true);
611 if (ret)
612 return ret;