Lines Matching refs:value
60 * Since the register has a reset value of 1, if property
75 * Since the register has a reset value of 1, if property
186 u32 value;
211 value = readl(eqos->regs + SDMEMCOMPPADCTRL);
212 value |= SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD;
213 writel(value, eqos->regs + SDMEMCOMPPADCTRL);
217 value = readl(eqos->regs + AUTO_CAL_CONFIG);
218 value |= AUTO_CAL_CONFIG_START | AUTO_CAL_CONFIG_ENABLE;
219 writel(value, eqos->regs + AUTO_CAL_CONFIG);
222 value,
223 value & AUTO_CAL_STATUS_ACTIVE,
231 value,
232 (value & AUTO_CAL_STATUS_ACTIVE) == 0,
240 value = readl(eqos->regs + SDMEMCOMPPADCTRL);
241 value &= ~SDMEMCOMPPADCTRL_PAD_E_INPUT_OR_E_PWRD;
242 writel(value, eqos->regs + SDMEMCOMPPADCTRL);
244 value = readl(eqos->regs + AUTO_CAL_CONFIG);
245 value &= ~AUTO_CAL_CONFIG_ENABLE;
246 writel(value, eqos->regs + AUTO_CAL_CONFIG);
258 u32 value;
262 value = (rate / 1000000) - 1;
263 writel(value, eqos->regs + GMAC_1US_TIC_COUNTER);