Lines Matching refs:lp
194 #define SMC_ENABLE_INT(lp, x) do { \
197 spin_lock_irqsave(&lp->lock, smc_enable_flags); \
198 mask = SMC_GET_INT_MASK(lp); \
200 SMC_SET_INT_MASK(lp, mask); \
201 spin_unlock_irqrestore(&lp->lock, smc_enable_flags); \
205 #define SMC_DISABLE_INT(lp, x) do { \
208 spin_lock_irqsave(&lp->lock, smc_disable_flags); \
209 mask = SMC_GET_INT_MASK(lp); \
211 SMC_SET_INT_MASK(lp, mask); \
212 spin_unlock_irqrestore(&lp->lock, smc_disable_flags); \
220 #define SMC_WAIT_MMU_BUSY(lp) do { \
221 if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) { \
223 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) { \
240 struct smc_local *lp = netdev_priv(dev);
241 void __iomem *ioaddr = lp->base;
248 spin_lock_irq(&lp->lock);
249 SMC_SELECT_BANK(lp, 2);
250 SMC_SET_INT_MASK(lp, 0);
251 pending_skb = lp->pending_tx_skb;
252 lp->pending_tx_skb = NULL;
253 spin_unlock_irq(&lp->lock);
266 SMC_SELECT_BANK(lp, 0);
267 SMC_SET_RCR(lp, RCR_SOFTRST);
274 SMC_SELECT_BANK(lp, 1);
283 if (lp->cfg.flags & SMC91X_NOWAIT)
292 SMC_SET_CONFIG(lp, cfg);
305 SMC_SELECT_BANK(lp, 0);
306 SMC_SET_RCR(lp, RCR_CLEAR);
307 SMC_SET_TCR(lp, TCR_CLEAR);
309 SMC_SELECT_BANK(lp, 1);
310 ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
321 SMC_SET_CTL(lp, ctl);
324 SMC_SELECT_BANK(lp, 2);
325 SMC_SET_MMU_CMD(lp, MC_RESET);
326 SMC_WAIT_MMU_BUSY(lp);
334 struct smc_local *lp = netdev_priv(dev);
335 void __iomem *ioaddr = lp->base;
341 SMC_SELECT_BANK(lp, 0);
342 SMC_SET_TCR(lp, lp->tcr_cur_mode);
343 SMC_SET_RCR(lp, lp->rcr_cur_mode);
345 SMC_SELECT_BANK(lp, 1);
346 SMC_SET_MAC_ADDR(lp, dev->dev_addr);
350 if (lp->version >= (CHIP_91100 << 4))
352 SMC_SELECT_BANK(lp, 2);
353 SMC_SET_INT_MASK(lp, mask);
368 struct smc_local *lp = netdev_priv(dev);
369 void __iomem *ioaddr = lp->base;
375 spin_lock_irq(&lp->lock);
376 SMC_SELECT_BANK(lp, 2);
377 SMC_SET_INT_MASK(lp, 0);
378 pending_skb = lp->pending_tx_skb;
379 lp->pending_tx_skb = NULL;
380 spin_unlock_irq(&lp->lock);
384 SMC_SELECT_BANK(lp, 0);
385 SMC_SET_RCR(lp, RCR_CLEAR);
386 SMC_SET_TCR(lp, TCR_CLEAR);
390 SMC_SELECT_BANK(lp, 1);
391 SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
400 struct smc_local *lp = netdev_priv(dev);
401 void __iomem *ioaddr = lp->base;
406 packet_number = SMC_GET_RXFIFO(lp);
413 SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
416 SMC_GET_PKT_HDR(lp, status, packet_len);
434 SMC_WAIT_MMU_BUSY(lp);
435 SMC_SET_MMU_CMD(lp, MC_RELEASE);
462 SMC_WAIT_MMU_BUSY(lp);
463 SMC_SET_MMU_CMD(lp, MC_RELEASE);
472 if (lp->version == 0x90)
482 SMC_PULL_DATA(lp, data, packet_len - 4);
484 SMC_WAIT_MMU_BUSY(lp);
485 SMC_SET_MMU_CMD(lp, MC_RELEASE);
540 struct smc_local *lp = from_tasklet(lp, t, tx_task);
541 struct net_device *dev = lp->dev;
542 void __iomem *ioaddr = lp->base;
550 if (!smc_special_trylock(&lp->lock, flags)) {
552 tasklet_schedule(&lp->tx_task);
556 skb = lp->pending_tx_skb;
558 smc_special_unlock(&lp->lock, flags);
561 lp->pending_tx_skb = NULL;
563 packet_no = SMC_GET_AR(lp);
568 smc_special_unlock(&lp->lock, flags);
573 SMC_SET_PN(lp, packet_no);
574 SMC_SET_PTR(lp, PTR_AUTOINC);
586 SMC_PUT_PKT_HDR(lp, 0, len + 6);
589 SMC_PUSH_DATA(lp, buf, len & ~1);
592 SMC_outw(lp, ((len & 1) ? (0x2000 | buf[len - 1]) : 0), ioaddr,
593 DATA_REG(lp));
607 SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
608 smc_special_unlock(&lp->lock, flags);
614 SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
631 struct smc_local *lp = netdev_priv(dev);
632 void __iomem *ioaddr = lp->base;
638 BUG_ON(lp->pending_tx_skb != NULL);
660 smc_special_lock(&lp->lock, flags);
663 SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
671 status = SMC_GET_INT(lp);
673 SMC_ACK_INT(lp, IM_ALLOC_INT);
678 smc_special_unlock(&lp->lock, flags);
680 lp->pending_tx_skb = skb;
685 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
691 smc_hardware_send_pkt(&lp->tx_task);
704 struct smc_local *lp = netdev_priv(dev);
705 void __iomem *ioaddr = lp->base;
712 packet_no = SMC_GET_TXFIFO(lp);
719 saved_packet = SMC_GET_PN(lp);
720 SMC_SET_PN(lp, packet_no);
723 SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
724 SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
745 SMC_WAIT_MMU_BUSY(lp);
746 SMC_SET_MMU_CMD(lp, MC_FREEPKT);
749 SMC_WAIT_MMU_BUSY(lp);
750 SMC_SET_PN(lp, saved_packet);
753 SMC_SELECT_BANK(lp, 0);
754 SMC_SET_TCR(lp, lp->tcr_cur_mode);
755 SMC_SELECT_BANK(lp, 2);
763 struct smc_local *lp = netdev_priv(dev);
764 void __iomem *ioaddr = lp->base;
767 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
776 SMC_SET_MII(lp, mii_reg);
778 SMC_SET_MII(lp, mii_reg | MII_MCLK);
785 struct smc_local *lp = netdev_priv(dev);
786 void __iomem *ioaddr = lp->base;
789 mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
790 SMC_SET_MII(lp, mii_reg);
793 if (SMC_GET_MII(lp) & MII_MDI)
796 SMC_SET_MII(lp, mii_reg);
798 SMC_SET_MII(lp, mii_reg | MII_MCLK);
810 struct smc_local *lp = netdev_priv(dev);
811 void __iomem *ioaddr = lp->base;
814 SMC_SELECT_BANK(lp, 3);
826 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
831 SMC_SELECT_BANK(lp, 2);
841 struct smc_local *lp = netdev_priv(dev);
842 void __iomem *ioaddr = lp->base;
844 SMC_SELECT_BANK(lp, 3);
853 SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
858 SMC_SELECT_BANK(lp, 2);
866 struct smc_local *lp = netdev_priv(dev);
871 lp->phy_type = 0;
891 lp->mii.phy_id = phyaddr & 31;
892 lp->phy_type = id1 << 16 | id2;
903 struct smc_local *lp = netdev_priv(dev);
904 void __iomem *ioaddr = lp->base;
905 int phyaddr = lp->mii.phy_id;
921 if (lp->ctl_rfduplx)
924 if (lp->ctl_rspeed == 100)
931 SMC_SELECT_BANK(lp, 0);
932 SMC_SET_RPC(lp, lp->rpc_cur_mode);
933 SMC_SELECT_BANK(lp, 2);
949 * Must be called with lp->lock locked.
953 struct smc_local *lp = netdev_priv(dev);
960 spin_unlock_irq(&lp->lock);
962 spin_lock_irq(&lp->lock);
980 struct smc_local *lp = netdev_priv(dev);
982 int phy = lp->mii.phy_id;
984 if (lp->phy_type == 0)
990 cancel_work_sync(&lp->phy_configure);
1006 struct smc_local *lp = netdev_priv(dev);
1007 void __iomem *ioaddr = lp->base;
1009 if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1011 if (lp->mii.full_duplex) {
1012 lp->tcr_cur_mode |= TCR_SWFDUP;
1014 lp->tcr_cur_mode &= ~TCR_SWFDUP;
1017 SMC_SELECT_BANK(lp, 0);
1018 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1033 struct smc_local *lp =
1035 struct net_device *dev = lp->dev;
1036 void __iomem *ioaddr = lp->base;
1037 int phyaddr = lp->mii.phy_id;
1043 spin_lock_irq(&lp->lock);
1048 if (lp->phy_type == 0)
1066 SMC_SELECT_BANK(lp, 0);
1067 SMC_SET_RPC(lp, lp->rpc_cur_mode);
1070 if (lp->mii.force_media) {
1098 if (lp->ctl_rspeed != 100)
1101 if (!lp->ctl_rfduplx)
1106 lp->mii.advertising = my_ad_caps;
1124 SMC_SELECT_BANK(lp, 2);
1125 spin_unlock_irq(&lp->lock);
1136 struct smc_local *lp = netdev_priv(dev);
1137 int phyaddr = lp->mii.phy_id;
1142 if (lp->phy_type == 0)
1159 struct smc_local *lp = netdev_priv(dev);
1160 void __iomem *ioaddr = lp->base;
1165 SMC_SELECT_BANK(lp, 0);
1166 new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1167 SMC_SELECT_BANK(lp, 2);
1175 if (netif_msg_link(lp))
1183 struct smc_local *lp = netdev_priv(dev);
1184 void __iomem *ioaddr = lp->base;
1189 SMC_SELECT_BANK(lp, 1);
1190 ctl = SMC_GET_CTL(lp);
1191 SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1192 SMC_SET_CTL(lp, ctl);
1193 SMC_SELECT_BANK(lp, 2);
1203 struct smc_local *lp = netdev_priv(dev);
1204 void __iomem *ioaddr = lp->base;
1210 spin_lock(&lp->lock);
1217 saved_pointer = SMC_GET_PTR(lp);
1218 mask = SMC_GET_INT_MASK(lp);
1219 SMC_SET_INT_MASK(lp, 0);
1225 status = SMC_GET_INT(lp);
1229 ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1230 meminfo = SMC_GET_MIR(lp);
1231 SMC_SELECT_BANK(lp, 2); meminfo; }),
1232 SMC_GET_FIFO(lp));
1242 SMC_ACK_INT(lp, IM_TX_INT);
1250 tasklet_hi_schedule(&lp->tx_task);
1257 SMC_SELECT_BANK(lp, 0);
1258 card_stats = SMC_GET_COUNTER(lp);
1259 SMC_SELECT_BANK(lp, 2);
1269 ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1270 eph_st = SMC_GET_EPH_STATUS(lp);
1271 SMC_SELECT_BANK(lp, 2); eph_st; }));
1272 SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1278 SMC_ACK_INT(lp, IM_MDINT);
1281 SMC_ACK_INT(lp, IM_ERCV_INT);
1287 SMC_SET_PTR(lp, saved_pointer);
1288 SMC_SET_INT_MASK(lp, mask);
1289 spin_unlock(&lp->lock);
1326 struct smc_local *lp = netdev_priv(dev);
1327 void __iomem *ioaddr = lp->base;
1332 spin_lock_irq(&lp->lock);
1333 status = SMC_GET_INT(lp);
1334 mask = SMC_GET_INT_MASK(lp);
1335 fifo = SMC_GET_FIFO(lp);
1336 SMC_SELECT_BANK(lp, 0);
1337 eph_st = SMC_GET_EPH_STATUS(lp);
1338 meminfo = SMC_GET_MIR(lp);
1339 SMC_SELECT_BANK(lp, 2);
1340 spin_unlock_irq(&lp->lock);
1352 if (lp->phy_type != 0)
1353 schedule_work(&lp->phy_configure);
1368 struct smc_local *lp = netdev_priv(dev);
1369 void __iomem *ioaddr = lp->base;
1377 lp->rcr_cur_mode |= RCR_PRMS;
1392 lp->rcr_cur_mode |= RCR_ALMUL;
1428 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1434 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1444 spin_lock_irq(&lp->lock);
1445 SMC_SELECT_BANK(lp, 0);
1446 SMC_SET_RCR(lp, lp->rcr_cur_mode);
1448 SMC_SELECT_BANK(lp, 3);
1449 SMC_SET_MCAST(lp, multicast_table);
1451 SMC_SELECT_BANK(lp, 2);
1452 spin_unlock_irq(&lp->lock);
1464 struct smc_local *lp = netdev_priv(dev);
1469 lp->tcr_cur_mode = TCR_DEFAULT;
1470 lp->rcr_cur_mode = RCR_DEFAULT;
1471 lp->rpc_cur_mode = RPC_DEFAULT |
1472 lp->cfg.leda << RPC_LSXA_SHFT |
1473 lp->cfg.ledb << RPC_LSXB_SHFT;
1479 if (lp->phy_type == 0)
1480 lp->tcr_cur_mode |= TCR_MON_CSN;
1487 if (lp->phy_type != 0)
1488 smc_phy_configure(&lp->phy_configure);
1490 spin_lock_irq(&lp->lock);
1492 spin_unlock_irq(&lp->lock);
1508 struct smc_local *lp = netdev_priv(dev);
1517 tasklet_kill(&lp->tx_task);
1529 struct smc_local *lp = netdev_priv(dev);
1531 if (lp->phy_type != 0) {
1532 spin_lock_irq(&lp->lock);
1533 mii_ethtool_get_link_ksettings(&lp->mii, cmd);
1534 spin_unlock_irq(&lp->lock);
1540 if (lp->ctl_rspeed == 10)
1542 else if (lp->ctl_rspeed == 100)
1547 cmd->base.duplex = lp->tcr_cur_mode & TCR_SWFDUP ?
1561 struct smc_local *lp = netdev_priv(dev);
1564 if (lp->phy_type != 0) {
1565 spin_lock_irq(&lp->lock);
1566 ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
1567 spin_unlock_irq(&lp->lock);
1576 // lp->port = cmd->base.port;
1577 lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
1599 struct smc_local *lp = netdev_priv(dev);
1602 if (lp->phy_type != 0) {
1603 spin_lock_irq(&lp->lock);
1604 ret = mii_nway_restart(&lp->mii);
1605 spin_unlock_irq(&lp->lock);
1613 struct smc_local *lp = netdev_priv(dev);
1614 return lp->msg_enable;
1619 struct smc_local *lp = netdev_priv(dev);
1620 lp->msg_enable = level;
1626 struct smc_local *lp = netdev_priv(dev);
1627 void __iomem *ioaddr = lp->base;
1629 spin_lock_irq(&lp->lock);
1631 SMC_SELECT_BANK(lp, 1);
1632 SMC_SET_GP(lp, word);
1634 SMC_SELECT_BANK(lp, 2);
1635 SMC_SET_PTR(lp, addr);
1637 SMC_SELECT_BANK(lp, 1);
1638 ctl = SMC_GET_CTL(lp);
1639 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
1643 } while (SMC_GET_CTL(lp) & CTL_STORE);
1645 SMC_SET_CTL(lp, ctl);
1646 SMC_SELECT_BANK(lp, 2);
1647 spin_unlock_irq(&lp->lock);
1654 struct smc_local *lp = netdev_priv(dev);
1655 void __iomem *ioaddr = lp->base;
1657 spin_lock_irq(&lp->lock);
1659 SMC_SELECT_BANK(lp, 2);
1660 SMC_SET_PTR(lp, addr | PTR_READ);
1662 SMC_SELECT_BANK(lp, 1);
1663 SMC_SET_GP(lp, 0xffff); /* init to known */
1664 ctl = SMC_GET_CTL(lp);
1665 SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
1669 } while (SMC_GET_CTL(lp) & CTL_RELOAD);
1671 *word = SMC_GET_GP(lp);
1673 SMC_SET_CTL(lp, ctl);
1674 SMC_SELECT_BANK(lp, 2);
1675 spin_unlock_irq(&lp->lock);
1773 static int smc_findirq(struct smc_local *lp)
1775 void __iomem *ioaddr = lp->base;
1779 DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1789 SMC_SELECT_BANK(lp, 2);
1790 SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1796 SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1804 int_status = SMC_GET_INT(lp);
1817 SMC_SET_INT_MASK(lp, 0);
1850 struct smc_local *lp = netdev_priv(dev);
1859 val = SMC_CURRENT_BANK(lp);
1876 SMC_SELECT_BANK(lp, 0);
1877 val = SMC_CURRENT_BANK(lp);
1889 SMC_SELECT_BANK(lp, 1);
1890 val = SMC_GET_BASE(lp);
1902 SMC_SELECT_BANK(lp, 3);
1903 revision_register = SMC_GET_REV(lp);
1920 lp->base = ioaddr;
1921 lp->version = revision_register & 0xff;
1922 spin_lock_init(&lp->lock);
1925 SMC_SELECT_BANK(lp, 1);
1926 SMC_GET_MAC_ADDR(lp, addr);
1952 dev->irq = smc_findirq(lp);
1970 tasklet_setup(&lp->tx_task, smc_hardware_send_pkt);
1971 INIT_WORK(&lp->phy_configure, smc_phy_configure);
1972 lp->dev = dev;
1973 lp->mii.phy_id_mask = 0x1f;
1974 lp->mii.reg_num_mask = 0x1f;
1975 lp->mii.force_media = 0;
1976 lp->mii.full_duplex = 0;
1977 lp->mii.dev = dev;
1978 lp->mii.mdio_read = smc_phy_read;
1979 lp->mii.mdio_write = smc_phy_write;
1984 if (lp->version >= (CHIP_91100 << 4))
1992 lp->msg_enable = NETIF_MSG_LINK;
1993 lp->ctl_rfduplx = 0;
1994 lp->ctl_rspeed = 10;
1996 if (lp->version >= (CHIP_91100 << 4)) {
1997 lp->ctl_rfduplx = 1;
1998 lp->ctl_rspeed = 100;
2008 lp->cfg.flags |= SMC91X_USE_DMA;
2010 if (lp->cfg.flags & SMC91X_USE_DMA) {
2015 lp->dma_chan = dma_request_channel(mask, NULL, NULL);
2024 lp->base, dev->irq);
2026 if (lp->dma_chan)
2027 pr_cont(" DMA %p", lp->dma_chan);
2030 lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
2041 if (lp->phy_type == 0) {
2043 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2045 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2052 if (retval && lp->dma_chan)
2053 dma_release_channel(lp->dma_chan);
2061 struct smc_local *lp = netdev_priv(ndev);
2104 if (!SMC_16BIT(lp))
2125 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2140 struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2150 struct smc_local *lp = netdev_priv(ndev);
2161 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2168 struct smc_local *lp = netdev_priv(ndev);
2171 if (lp->datacs)
2172 iounmap(lp->datacs);
2174 lp->datacs = NULL;
2242 struct smc_local *lp;
2261 lp = netdev_priv(ndev);
2262 lp->cfg.flags = 0;
2265 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2266 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2268 if (!SMC_8BIT(lp) && !SMC_16BIT(lp)) {
2282 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
2291 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
2300 if (lp->reset_gpio)
2307 lp->cfg.flags |= SMC91X_USE_8BIT;
2309 lp->cfg.flags |= SMC91X_USE_16BIT;
2311 lp->cfg.flags |= SMC91X_USE_32BIT;
2313 lp->cfg.flags |= SMC91X_USE_16BIT;
2317 lp->io_shift = val;
2318 lp->cfg.pxa_u16_align4 =
2324 lp->cfg.flags |= (SMC_CAN_USE_8BIT) ? SMC91X_USE_8BIT : 0;
2325 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2326 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2327 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2330 if (!lp->cfg.leda && !lp->cfg.ledb) {
2331 lp->cfg.leda = RPC_LSA_DEFAULT;
2332 lp->cfg.ledb = RPC_LSB_DEFAULT;
2385 struct smc_local *lp = netdev_priv(ndev);
2386 lp->device = &pdev->dev;
2387 lp->physaddr = res->start;
2417 struct smc_local *lp = netdev_priv(ndev);
2425 if (lp->dma_chan)
2426 dma_release_channel(lp->dma_chan);
2428 iounmap(lp->base);
2463 struct smc_local *lp = netdev_priv(ndev);
2468 if (lp->phy_type != 0)
2469 smc_phy_configure(&lp->phy_configure);