Lines Matching defs:efx
16 #include "efx.h"
32 static void siena_init_wol(struct efx_nic *efx);
37 struct efx_nic *efx = channel->efx;
43 ticks = efx_siena_usecs_to_ticks(efx, channel->irq_moderation_us);
55 efx_writed_page_locked(channel->efx, &timer_cmd, FR_BZ_TIMER_COMMAND_P0,
59 void efx_siena_prepare_flush(struct efx_nic *efx)
61 if (efx->fc_disable++ == 0)
62 efx_siena_mcdi_set_mac(efx);
65 void siena_finish_flush(struct efx_nic *efx)
67 if (--efx->fc_disable == 0)
68 efx_siena_mcdi_set_mac(efx);
100 static int siena_test_chip(struct efx_nic *efx, struct efx_self_tests *tests)
105 efx_siena_reset_down(efx, reset_method);
110 rc = efx_siena_mcdi_reset(efx, reset_method);
115 efx_farch_test_registers(efx, siena_register_tests,
119 rc = efx_siena_mcdi_reset(efx, reset_method);
121 rc2 = efx_siena_reset_up(efx, reset_method, rc == 0);
132 static void siena_ptp_write_host_time(struct efx_nic *efx, u32 host_time)
134 _efx_writed(efx, cpu_to_le32(host_time),
138 static int siena_ptp_set_ts_config(struct efx_nic *efx,
146 return efx_siena_ptp_change_mode(efx,
148 efx_siena_ptp_get_mode(efx));
153 return efx_siena_ptp_change_mode(efx, true, MC_CMD_PTP_MODE_V1);
158 rc = efx_siena_ptp_change_mode(efx, true,
166 rc = efx_siena_ptp_change_mode(efx, true,
213 static void siena_monitor(struct efx_nic *efx)
215 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
221 static int siena_probe_nvconfig(struct efx_nic *efx)
226 rc = efx_siena_mcdi_get_board_cfg(efx, efx->net_dev->perm_addr, NULL,
229 efx->timer_quantum_ns =
232 efx->timer_max_ns = efx->type->timer_period_max *
233 efx->timer_quantum_ns;
238 static int siena_dimension_resources(struct efx_nic *efx)
244 efx_farch_dimension_resources(efx, FR_CZ_BUF_FULL_TBL_ROWS / 2);
251 static unsigned int siena_mem_bar(struct efx_nic *efx)
256 static unsigned int siena_mem_map_size(struct efx_nic *efx)
262 static int siena_probe_nic(struct efx_nic *efx)
272 nic_data->efx = efx;
273 efx->nic_data = nic_data;
275 if (efx_farch_fpga_ver(efx) != 0) {
276 netif_err(efx, probe, efx->net_dev,
282 efx->max_channels = EFX_MAX_CHANNELS;
283 efx->max_vis = EFX_MAX_CHANNELS;
284 efx->max_tx_channels = EFX_MAX_CHANNELS;
285 efx->tx_queues_per_channel = 4;
287 efx_reado(efx, ®, FR_AZ_CS_DEBUG);
288 efx->port_num = EFX_OWORD_FIELD(reg, FRF_CZ_CS_PORT_NUM) - 1;
290 rc = efx_siena_mcdi_init(efx);
295 rc = efx_siena_mcdi_reset(efx, RESET_TYPE_ALL);
297 netif_err(efx, probe, efx->net_dev, "failed to reset NIC\n");
301 siena_init_wol(efx);
304 rc = efx_siena_alloc_buffer(efx, &efx->irq_status, sizeof(efx_oword_t),
308 BUG_ON(efx->irq_status.dma_addr & 0x0f);
310 netif_dbg(efx, probe, efx->net_dev,
312 (unsigned long long)efx->irq_status.dma_addr,
313 efx->irq_status.addr,
314 (unsigned long long)virt_to_phys(efx->irq_status.addr));
317 rc = siena_probe_nvconfig(efx);
319 netif_err(efx, probe, efx->net_dev,
321 efx->phy_type = PHY_TYPE_NONE;
322 efx->mdio.prtad = MDIO_PRTAD_NONE;
327 rc = efx_siena_mcdi_mon_probe(efx);
332 efx_siena_sriov_probe(efx);
334 efx_siena_ptp_defer_probe_with_channel(efx);
339 efx_siena_free_buffer(efx, &efx->irq_status);
342 efx_siena_mcdi_detach(efx);
343 efx_siena_mcdi_fini(efx);
345 kfree(efx->nic_data);
349 static int siena_rx_pull_rss_config(struct efx_nic *efx)
357 efx_reado(efx, &temp, FR_CZ_RX_RSS_IPV6_REG1);
358 memcpy(efx->rss_context.rx_hash_key, &temp, sizeof(temp));
359 efx_reado(efx, &temp, FR_CZ_RX_RSS_IPV6_REG2);
360 memcpy(efx->rss_context.rx_hash_key + sizeof(temp), &temp, sizeof(temp));
361 efx_reado(efx, &temp, FR_CZ_RX_RSS_IPV6_REG3);
362 memcpy(efx->rss_context.rx_hash_key + 2 * sizeof(temp), &temp,
364 efx_farch_rx_pull_indir_table(efx);
368 static int siena_rx_push_rss_config(struct efx_nic *efx, bool user,
375 memcpy(efx->rss_context.rx_hash_key, key, sizeof(temp));
376 memcpy(&temp, efx->rss_context.rx_hash_key, sizeof(temp));
377 efx_writeo(efx, &temp, FR_BZ_RX_RSS_TKEY);
380 BUILD_BUG_ON(sizeof(efx->rss_context.rx_hash_key) <
383 memcpy(&temp, efx->rss_context.rx_hash_key, sizeof(temp));
384 efx_writeo(efx, &temp, FR_CZ_RX_RSS_IPV6_REG1);
385 memcpy(&temp, efx->rss_context.rx_hash_key + sizeof(temp), sizeof(temp));
386 efx_writeo(efx, &temp, FR_CZ_RX_RSS_IPV6_REG2);
389 memcpy(&temp, efx->rss_context.rx_hash_key + 2 * sizeof(temp),
391 efx_writeo(efx, &temp, FR_CZ_RX_RSS_IPV6_REG3);
393 memcpy(efx->rss_context.rx_indir_table, rx_indir_table,
394 sizeof(efx->rss_context.rx_indir_table));
395 efx_farch_rx_push_indir_table(efx);
404 static int siena_init_nic(struct efx_nic *efx)
410 rc = efx_siena_mcdi_handle_assertion(efx);
415 efx_reado(efx, &temp, FR_AZ_TX_RESERVED);
417 efx_writeo(efx, &temp, FR_AZ_TX_RESERVED);
422 efx_reado(efx, &temp, FR_AZ_TX_CFG);
425 efx_writeo(efx, &temp, FR_AZ_TX_CFG);
427 efx_reado(efx, &temp, FR_AZ_RX_CFG);
438 efx_writeo(efx, &temp, FR_AZ_RX_CFG);
440 siena_rx_push_rss_config(efx, false, efx->rss_context.rx_indir_table, NULL);
441 efx->rss_context.context_id = 0; /* indicates RSS is active */
444 rc = efx_siena_mcdi_log_ctrl(efx, true, false, 0);
450 efx_writeo(efx, &temp, FR_BZ_DP_CTRL);
453 efx_writeo(efx, &temp, FR_CZ_USR_EV_CFG);
455 efx_farch_init_common(efx);
459 static void siena_remove_nic(struct efx_nic *efx)
461 efx_siena_mcdi_mon_remove(efx);
463 efx_siena_free_buffer(efx, &efx->irq_status);
465 efx_siena_mcdi_reset(efx, RESET_TYPE_ALL);
467 efx_siena_mcdi_detach(efx);
468 efx_siena_mcdi_fini(efx);
471 kfree(efx->nic_data);
472 efx->nic_data = NULL;
548 static size_t siena_describe_nic_stats(struct efx_nic *efx, u8 *names)
554 static int siena_try_update_nic_stats(struct efx_nic *efx)
556 struct siena_nic_data *nic_data = efx->nic_data;
561 dma_stats = efx->stats_buffer.addr;
563 generation_end = dma_stats[efx->num_mac_stats - 1];
568 stats, efx->stats_buffer.addr, false);
575 efx_siena_fix_nodesc_drop_stat(efx,
588 efx_siena_update_sw_stats(efx, stats);
592 static size_t siena_update_nic_stats(struct efx_nic *efx, u64 *full_stats,
595 struct siena_nic_data *nic_data = efx->nic_data;
602 if (siena_try_update_nic_stats(efx) == 0)
640 static int siena_mac_reconfigure(struct efx_nic *efx, bool mtu_only __always_unused)
647 sizeof(efx->multicast_hash));
649 efx_farch_filter_sync_rx_mode(efx);
651 WARN_ON(!mutex_is_locked(&efx->mac_lock));
653 rc = efx_siena_mcdi_set_mac(efx);
658 efx->multicast_hash.byte, sizeof(efx->multicast_hash));
659 return efx_siena_mcdi_rpc(efx, MC_CMD_SET_MCAST_HASH,
670 static void siena_get_wol(struct efx_nic *efx, struct ethtool_wolinfo *wol)
672 struct siena_nic_data *nic_data = efx->nic_data;
683 static int siena_set_wol(struct efx_nic *efx, u32 type)
685 struct siena_nic_data *nic_data = efx->nic_data;
693 efx_siena_mcdi_wol_filter_remove(efx,
695 rc = efx_siena_mcdi_wol_filter_set_magic(efx,
696 efx->net_dev->dev_addr,
701 pci_wake_from_d3(efx->pci_dev, true);
703 rc = efx_siena_mcdi_wol_filter_reset(efx);
705 pci_wake_from_d3(efx->pci_dev, false);
712 netif_err(efx, hw, efx->net_dev, "%s failed: type=%d rc=%d\n",
718 static void siena_init_wol(struct efx_nic *efx)
720 struct siena_nic_data *nic_data = efx->nic_data;
723 rc = efx_siena_mcdi_wol_filter_get_magic(efx, &nic_data->wol_filter_id);
728 efx_siena_mcdi_wol_filter_reset(efx);
731 pci_wake_from_d3(efx->pci_dev, true);
742 #define MCDI_PDU(efx) \
743 (efx_port_num(efx) ? MC_SMEM_P1_PDU_OFST : MC_SMEM_P0_PDU_OFST)
744 #define MCDI_DOORBELL(efx) \
745 (efx_port_num(efx) ? MC_SMEM_P1_DOORBELL_OFST : MC_SMEM_P0_DOORBELL_OFST)
746 #define MCDI_STATUS(efx) \
747 (efx_port_num(efx) ? MC_SMEM_P1_STATUS_OFST : MC_SMEM_P0_STATUS_OFST)
749 static void siena_mcdi_request(struct efx_nic *efx,
753 unsigned pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
754 unsigned doorbell = FR_CZ_MC_TREG_SMEM + MCDI_DOORBELL(efx);
760 efx_writed(efx, hdr, pdu);
763 efx_writed(efx, &sdu[i], pdu + hdr_len + 4 * i);
769 _efx_writed(efx, (__force __le32) 0x45789abc, doorbell);
772 static bool siena_mcdi_poll_response(struct efx_nic *efx)
774 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
777 efx_readd(efx, &hdr, pdu);
787 static void siena_mcdi_read_response(struct efx_nic *efx, efx_dword_t *outbuf,
790 unsigned int pdu = FR_CZ_MC_TREG_SMEM + MCDI_PDU(efx);
795 efx_readd(efx, &outbuf[i], pdu + offset + 4 * i);
798 static int siena_mcdi_poll_reboot(struct efx_nic *efx)
800 struct siena_nic_data *nic_data = efx->nic_data;
801 unsigned int addr = FR_CZ_MC_TREG_SMEM + MCDI_STATUS(efx);
805 efx_readd(efx, ®, addr);
812 efx_writed(efx, ®, addr);
856 static int siena_mtd_probe_partition(struct efx_nic *efx,
871 if (info->port != efx_port_num(efx))
874 rc = efx_siena_mcdi_nvram_info(efx, type, &size, &erase_size,
893 static int siena_mtd_get_fw_subtypes(struct efx_nic *efx,
902 rc = efx_siena_mcdi_get_board_cfg(efx, NULL, fw_subtype_list, NULL);
912 static int siena_mtd_probe(struct efx_nic *efx)
922 rc = efx_siena_mcdi_nvram_types(efx, &nvram_types);
935 rc = siena_mtd_probe_partition(efx, &parts[n_parts],
946 rc = siena_mtd_get_fw_subtypes(efx, parts, n_parts);
950 rc = efx_siena_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts));
959 static unsigned int siena_check_caps(const struct efx_nic *efx,
966 static unsigned int efx_siena_recycle_ring_size(const struct efx_nic *efx)
974 * Revision-dependent attributes used by efx.c and nic.c