Lines Matching defs:efx
17 #include "efx.h"
31 int efx_siena_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
34 buffer->addr = dma_alloc_coherent(&efx->pci_dev->dev, len,
42 void efx_siena_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer)
45 dma_free_coherent(&efx->pci_dev->dev, buffer->len,
63 channel->efx->type->ev_test_generate(channel);
66 int efx_siena_irq_test_start(struct efx_nic *efx)
68 efx->last_irq_cpu = -1;
70 return efx->type->irq_test_generate(efx);
76 int efx_siena_init_interrupt(struct efx_nic *efx)
82 if (!EFX_INT_MODE_USE_MSI(efx)) {
83 rc = request_irq(efx->legacy_irq,
84 efx->type->irq_handle_legacy, IRQF_SHARED,
85 efx->name, efx);
87 netif_err(efx, drv, efx->net_dev,
89 efx->pci_dev->irq);
92 efx->irqs_hooked = true;
97 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
98 efx->net_dev->rx_cpu_rmap =
99 alloc_irq_cpu_rmap(efx->n_rx_channels);
100 if (!efx->net_dev->rx_cpu_rmap) {
109 efx_for_each_channel(channel, efx) {
110 rc = request_irq(channel->irq, efx->type->irq_handle_msi,
112 efx->msi_context[channel->channel].name,
113 &efx->msi_context[channel->channel]);
115 netif_err(efx, drv, efx->net_dev,
122 if (efx->interrupt_mode == EFX_INT_MODE_MSIX &&
123 channel->channel < efx->n_rx_channels) {
124 rc = irq_cpu_rmap_add(efx->net_dev->rx_cpu_rmap,
132 efx->irqs_hooked = true;
137 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
138 efx->net_dev->rx_cpu_rmap = NULL;
140 efx_for_each_channel(channel, efx) {
143 free_irq(channel->irq, &efx->msi_context[channel->channel]);
149 void efx_siena_fini_interrupt(struct efx_nic *efx)
154 free_irq_cpu_rmap(efx->net_dev->rx_cpu_rmap);
155 efx->net_dev->rx_cpu_rmap = NULL;
158 if (!efx->irqs_hooked)
160 if (EFX_INT_MODE_USE_MSI(efx)) {
162 efx_for_each_channel(channel, efx)
164 &efx->msi_context[channel->channel]);
167 free_irq(efx->legacy_irq, efx);
169 efx->irqs_hooked = false;
367 size_t efx_siena_get_regs_len(struct efx_nic *efx)
376 if (efx->type->revision >= reg->min_revision &&
377 efx->type->revision <= reg->max_revision)
383 if (efx->type->revision >= table->min_revision &&
384 efx->type->revision <= table->max_revision)
390 void efx_siena_get_regs(struct efx_nic *efx, void *buf)
398 if (efx->type->revision >= reg->min_revision &&
399 efx->type->revision <= reg->max_revision) {
400 efx_reado(efx, (efx_oword_t *)buf, reg->offset);
410 if (!(efx->type->revision >= table->min_revision &&
411 efx->type->revision <= table->max_revision))
419 efx_readd(efx, buf, table->offset + 4 * i);
422 efx_sram_readq(efx,
423 efx->membase + table->offset,
427 efx_reado_table(efx, buf, table->offset, i);
430 efx_reado_table(efx, buf, table->offset, 2 * i);
521 void efx_siena_fix_nodesc_drop_stat(struct efx_nic *efx, u64 *rx_nodesc_drops)
524 if (!(efx->net_dev->flags & IFF_UP) || !efx->rx_nodesc_drops_prev_state)
525 efx->rx_nodesc_drops_while_down +=
526 *rx_nodesc_drops - efx->rx_nodesc_drops_total;
527 efx->rx_nodesc_drops_total = *rx_nodesc_drops;
528 efx->rx_nodesc_drops_prev_state = !!(efx->net_dev->flags & IFF_UP);
529 *rx_nodesc_drops -= efx->rx_nodesc_drops_while_down;