Lines Matching defs:channel
69 _EFX_CHANNEL_MAGIC(_EFX_CHANNEL_MAGIC_TEST, (_channel)->channel)
80 static void efx_farch_magic_event(struct efx_channel *channel, u32 magic);
399 tx_queue->channel->channel,
538 efx_rx_queue_channel(rx_queue)->channel,
606 struct efx_channel *channel;
609 efx_for_each_channel(channel, efx) {
610 efx_for_each_channel_tx_queue(tx_queue, channel) {
633 efx_farch_magic_event(channel,
645 * are no more RX and TX events left on any channel. */
649 struct efx_channel *channel;
654 efx_for_each_channel(channel, efx) {
655 efx_for_each_channel_tx_queue(tx_queue, channel) {
658 efx_for_each_channel_rx_queue(rx_queue, channel) {
679 efx_for_each_channel(channel, efx) {
680 efx_for_each_channel_rx_queue(rx_queue, channel) {
718 struct efx_channel *channel;
732 efx_for_each_channel(channel, efx) {
733 efx_for_each_channel_rx_queue(rx_queue, channel)
735 efx_for_each_channel_tx_queue(tx_queue, channel)
769 * Event queues are processed by per-channel tasklets.
773 /* Update a channel's event queue's read pointer (RPTR) register
775 * This writes the EVQ_RPTR_REG register for the specified channel's
778 void efx_farch_ev_read_ack(struct efx_channel *channel)
781 struct efx_nic *efx = channel->efx;
784 channel->eventq_read_ptr & channel->eventq_mask);
791 FR_BZ_EVQ_RPTR_STEP * channel->channel);
810 static void efx_farch_magic_event(struct efx_channel *channel, u32 magic)
817 efx_farch_generate_event(channel->efx, channel->channel, &event);
826 efx_farch_handle_tx_event(struct efx_channel *channel, efx_qword_t *event)
831 struct efx_nic *efx = channel->efx;
840 tx_queue = channel->tx_queue +
846 tx_queue = channel->tx_queue +
856 "channel %d unexpected TX event "
857 EFX_QWORD_FMT"\n", channel->channel,
866 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
892 ++channel->n_rx_frm_trunc;
894 ++channel->n_rx_tobe_disc;
897 ++channel->n_rx_ip_hdr_chksum_err;
899 ++channel->n_rx_tcp_udp_chksum_err;
943 struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
950 ++channel->n_rx_nodesc_trunc;
972 efx_farch_handle_rx_event(struct efx_channel *channel, const efx_qword_t *event)
980 struct efx_nic *efx = channel->efx;
988 channel->channel);
990 rx_queue = efx_channel_get_rx_queue(channel);
1063 ++channel->n_rx_mcast_mismatch;
1068 channel->irq_mod_score += 2;
1086 struct efx_channel *channel;
1091 channel = efx_get_tx_channel(efx, qid / EFX_MAX_TXQ_PER_CHANNEL);
1092 tx_queue = channel->tx_queue + (qid % EFX_MAX_TXQ_PER_CHANNEL);
1094 efx_farch_magic_event(tx_queue->channel,
1106 struct efx_channel *channel;
1115 channel = efx_get_channel(efx, qid);
1116 if (!efx_channel_has_rx_queue(channel))
1118 rx_queue = efx_channel_get_rx_queue(channel);
1135 efx_farch_handle_drain_event(struct efx_channel *channel)
1137 struct efx_nic *efx = channel->efx;
1145 static void efx_farch_handle_generated_event(struct efx_channel *channel,
1148 struct efx_nic *efx = channel->efx;
1150 efx_channel_has_rx_queue(channel) ?
1151 efx_channel_get_rx_queue(channel) : NULL;
1157 if (magic == EFX_CHANNEL_MAGIC_TEST(channel)) {
1158 channel->event_test_cpu = raw_smp_processor_id();
1165 efx_farch_handle_drain_event(channel);
1167 efx_farch_handle_drain_event(channel);
1169 netif_dbg(efx, hw, efx->net_dev, "channel %d received "
1171 channel->channel, EFX_QWORD_VAL(*event));
1176 efx_farch_handle_driver_event(struct efx_channel *channel, efx_qword_t *event)
1178 struct efx_nic *efx = channel->efx;
1187 netif_vdbg(efx, hw, efx->net_dev, "channel %d TXQ %d flushed\n",
1188 channel->channel, ev_sub_data);
1195 netif_vdbg(efx, hw, efx->net_dev, "channel %d RXQ %d flushed\n",
1196 channel->channel, ev_sub_data);
1204 "channel %d EVQ %d initialised\n",
1205 channel->channel, ev_sub_data);
1209 "channel %d SRAM update done\n", channel->channel);
1213 "channel %d RXQ %d wakeup event\n",
1214 channel->channel, ev_sub_data);
1218 "channel %d RX queue %d timer expired\n",
1219 channel->channel, ev_sub_data);
1223 "channel %d seen DRIVER RX_RESET event. "
1224 "Resetting.\n", channel->channel);
1256 "channel %d unknown driver event code %d "
1257 "data %04x\n", channel->channel, ev_sub_code,
1263 int efx_farch_ev_process(struct efx_channel *channel, int budget)
1265 struct efx_nic *efx = channel->efx;
1274 read_ptr = channel->eventq_read_ptr;
1277 p_event = efx_event(channel, read_ptr);
1284 netif_vdbg(channel->efx, intr, channel->efx->net_dev,
1285 "channel %d event is "EFX_QWORD_FMT"\n",
1286 channel->channel, EFX_QWORD_VAL(event));
1297 efx_farch_handle_rx_event(channel, &event);
1302 efx_farch_handle_tx_event(channel, &event);
1305 efx_farch_handle_generated_event(channel, &event);
1308 efx_farch_handle_driver_event(channel, &event);
1312 efx_siena_sriov_event(channel, &event);
1316 efx_siena_mcdi_process_event(channel, &event);
1320 efx->type->handle_global_event(channel, &event))
1324 netif_err(channel->efx, hw, channel->efx->net_dev,
1325 "channel %d unknown event type %d (data "
1326 EFX_QWORD_FMT ")\n", channel->channel,
1332 channel->eventq_read_ptr = read_ptr;
1337 int efx_farch_ev_probe(struct efx_channel *channel)
1339 struct efx_nic *efx = channel->efx;
1342 entries = channel->eventq_mask + 1;
1343 return efx_alloc_special_buffer(efx, &channel->eventq,
1347 int efx_farch_ev_init(struct efx_channel *channel)
1350 struct efx_nic *efx = channel->efx;
1353 "channel %d event queue in special buffers %d-%d\n",
1354 channel->channel, channel->eventq.index,
1355 channel->eventq.index + channel->eventq.entries - 1);
1361 efx_writeo_table(efx, ®, FR_BZ_TIMER_TBL, channel->channel);
1364 efx_init_special_buffer(efx, &channel->eventq);
1367 memset(channel->eventq.buf.addr, 0xff, channel->eventq.buf.len);
1372 FRF_AZ_EVQ_SIZE, __ffs(channel->eventq.entries),
1373 FRF_AZ_EVQ_BUF_BASE_ID, channel->eventq.index);
1375 channel->channel);
1380 void efx_farch_ev_fini(struct efx_channel *channel)
1383 struct efx_nic *efx = channel->efx;
1388 channel->channel);
1389 efx_writeo_table(efx, ®, FR_BZ_TIMER_TBL, channel->channel);
1392 efx_fini_special_buffer(efx, &channel->eventq);
1396 void efx_farch_ev_remove(struct efx_channel *channel)
1398 efx_free_special_buffer(channel->efx, &channel->eventq);
1402 void efx_farch_ev_test_generate(struct efx_channel *channel)
1404 efx_farch_magic_event(channel, EFX_CHANNEL_MAGIC_TEST(channel));
1417 * queue processing is carried out by per-channel tasklets.
1520 struct efx_channel *channel;
1552 efx_for_each_channel(channel, efx) {
1554 efx_schedule_channel_irq(channel);
1572 efx_for_each_channel(channel, efx) {
1573 event = efx_event(channel,
1574 channel->eventq_read_ptr);
1576 efx_schedule_channel_irq(channel);
1578 efx_farch_ev_read_ack(channel);
1620 /* Schedule processing of the channel */
1621 efx_schedule_channel_irq(efx->channel[context->index]);
2222 /* If there's only one channel then disable RSS for non VF