Lines Matching defs:queue
63 /* Checksum generation is a per-queue option in hardware, so each
64 * queue visible to the networking core is backed by two hardware TX
136 * This field is zero when the queue slot is empty.
164 * struct efx_tx_queue - An Efx TX queue
177 * @queue: DMA queue number
180 * @type: configuration type of this TX queue. A bitmask of %EFX_TXQ_TYPE_* flags.
181 * @tso_version: Version of TSO in use for this queue.
184 * @core_txq: The networking core TX queue structure
190 * @piobuf: PIO buffer region for this TX queue (shared with its partner).
193 * @initialised: Has hardware queue been initialised?
195 * @xdp_tx: Is this an XDP tx queue?
201 * variable indicates that the queue is empty. This is to
222 * variable indicates that the queue is full. This is to
235 * @empty_read_count: If the completion path has seen the queue as empty
242 unsigned int queue;
336 * struct efx_rx_queue - An Efx RX queue
338 * @core_index: Index of network core RX queue. Will be >= 0 iff this
339 * is associated with a real RX queue.
349 * @added_count: Number of buffers added to the receive queue.
352 * @removed_count: Number of buffers removed from the receive queue.
373 * @xdp_rxq_info: XDP specific RX queue information.
423 * A channel comprises an event queue, at least one TX queue, at least
424 * one RX queue, and an associated tasklet for processing the event
425 * queue.
430 * @eventq_init: Event queue initialised flag
438 * @eventq: Event queue buffer
439 * @eventq_mask: Event queue pointer mask
440 * @eventq_read_ptr: Event queue read pointer
476 * @rx_queue: RX queue for this channel
579 * @keep_eventq: Flag for whether event queue should be kept initialised
810 EFX_XDP_TX_QUEUES_DEDICATED, /* one queue per core, locking not needed */
811 EFX_XDP_TX_QUEUES_SHARED, /* each queue used by more than 1 core */
859 * @txq_stop_thresh: TX queue fill level at or above which we stop it.
860 * @txq_wake_thresh: TX queue fill level at or below which we wake it.
861 * @tx_dc_base: Base qword address in SRAM of TX queue descriptor caches
862 * @rx_dc_base: Base qword address in SRAM of RX queue descriptor caches
896 * @irq_zero_count: Number of legacy IRQs seen with queue flags == 0
897 * @irq_level: IRQ level/index for IRQs not triggered by an event queue
927 * ensure that network back pressure doesn't delay dma queue flushes.
949 * @flush_wq: wait queue used by efx_nic_flush_queues() to wait for flush completions.
1258 * @irq_enable_master: Enable IRQs on the NIC. Each event queue must
1262 * queue must be separately disabled before this.
1267 * @tx_probe: Allocate resources for TX queue (and select TXQ type)
1268 * @tx_init: Initialise TX queue on the NIC
1269 * @tx_remove: Free resources for TX queue
1271 * @tx_enqueue: Add an SKB to TX queue
1278 * @rx_probe: Allocate resources for RX queue
1279 * @rx_init: Initialise RX queue on the NIC
1280 * @rx_remove: Free resources for RX queue
1285 * @ev_probe: Allocate resources for event queue
1286 * @ev_init: Initialise event queue on the NIC
1287 * @ev_fini: Deinitialise event queue on the NIC
1288 * @ev_remove: Free resources for event queue
1289 * @ev_process: Process events for a queue, up to the given NAPI quota
1290 * @ev_read_ack: Acknowledge read events on a queue, rearming its IRQ
1335 * @evq_ptr_tbl_base: Event queue pointer table base address
1336 * @evq_rptr_tbl_base: Event queue read-pointer table base address
1647 * descriptor queue.
1734 /* Get the current TX queue insert index. */