Lines Matching refs:event

578 	/* Enable event logging */
1462 * For an FLR, we never get an MC reset event, but the MC has reset all
2133 * Handle an MSI hardware interrupt. This routine schedules event
2630 efx_qword_t event;
2632 EFX_POPULATE_QWORD_2(event,
2641 memcpy(MCDI_PTR(inbuf, DRIVER_EVENT_IN_DATA), &event.u64[0],
2677 "rx event arrived on queue %d labeled as queue %u\n",
2722 const efx_qword_t *event)
2727 if (EFX_QWORD_FIELD(*event, ESF_DZ_RX_ECRC_ERR)) {
2735 if (EFX_QWORD_FIELD(*event, ESF_DZ_RX_IPCKSUM_ERR)) {
2742 "invalid class for RX_IPCKSUM_ERR: event="
2744 EFX_QWORD_VAL(*event));
2751 if (EFX_QWORD_FIELD(*event, ESF_DZ_RX_TCPUDP_CKSUM_ERR)) {
2758 "invalid class for RX_TCPUDP_CKSUM_ERR: event="
2760 EFX_QWORD_VAL(*event));
2767 if (EFX_QWORD_FIELD(*event, ESF_EZ_RX_IP_INNER_CHKSUM_ERR)) {
2770 "invalid encapsulation type for RX_IP_INNER_CHKSUM_ERR: event="
2772 EFX_QWORD_VAL(*event));
2778 "invalid class for RX_IP_INNER_CHKSUM_ERR: event="
2780 EFX_QWORD_VAL(*event));
2785 if (EFX_QWORD_FIELD(*event, ESF_EZ_RX_TCP_UDP_INNER_CHKSUM_ERR)) {
2788 "invalid encapsulation type for RX_TCP_UDP_INNER_CHKSUM_ERR: event="
2790 EFX_QWORD_VAL(*event));
2796 "invalid class for RX_TCP_UDP_INNER_CHKSUM_ERR: event="
2798 EFX_QWORD_VAL(*event));
2809 const efx_qword_t *event)
2825 rx_bytes = EFX_QWORD_FIELD(*event, ESF_DZ_RX_BYTES);
2826 next_ptr_lbits = EFX_QWORD_FIELD(*event, ESF_DZ_RX_DSC_PTR_LBITS);
2827 rx_queue_label = EFX_QWORD_FIELD(*event, ESF_DZ_RX_QLABEL);
2828 rx_l3_class = EFX_QWORD_FIELD(*event, ESF_DZ_RX_L3_CLASS);
2829 rx_l4_class = EFX_QWORD_FIELD(*event, ESF_FZ_RX_L4_CLASS);
2830 rx_cont = EFX_QWORD_FIELD(*event, ESF_DZ_RX_CONT);
2834 EFX_QWORD_FIELD(*event, ESF_EZ_RX_ENCAP_HDR) :
2837 if (EFX_QWORD_FIELD(*event, ESF_DZ_RX_DROP_EVENT))
2838 netdev_WARN(efx->net_dev, "saw RX_DROP_EVENT: event="
2840 EFX_QWORD_VAL(*event));
2857 "invalid RX abort: scatter_n=%u event="
2860 EFX_QWORD_VAL(*event));
2900 EFX_AND_QWORD(errors, *event, errors);
2905 event);
2923 "unknown encapsulation type: event="
2925 EFX_QWORD_VAL(*event));
2949 static u32 efx_ef10_extract_event_ts(efx_qword_t *event)
2953 tstamp = EFX_QWORD_FIELD(*event, TX_TIMESTAMP_EVENT_TSTAMP_DATA_HI);
2955 tstamp |= EFX_QWORD_FIELD(*event, TX_TIMESTAMP_EVENT_TSTAMP_DATA_LO);
2961 efx_ef10_handle_tx_event(struct efx_channel *channel, efx_qword_t *event)
2974 if (unlikely(EFX_QWORD_FIELD(*event, ESF_DZ_TX_DROP_EVENT)))
2978 tx_ev_q_label = EFX_QWORD_FIELD(*event, ESF_DZ_TX_QLABEL);
2983 tx_ev_desc_ptr = EFX_QWORD_FIELD(*event, ESF_DZ_TX_DESCR_INDX);
2989 * - the normal completion event (may be omitted)
3007 * fields in the event.
3009 tx_ev_type = EFX_QWORD_FIELD(*event, ESF_EZ_TX_SOFT1);
3014 /* Ignore this event - see above. */
3018 ts_part = efx_ef10_extract_event_ts(event);
3023 ts_part = efx_ef10_extract_event_ts(event);
3032 "channel %d unknown tx event type %d (data "
3035 EFX_QWORD_VAL(*event));
3043 efx_ef10_handle_driver_event(struct efx_channel *channel, efx_qword_t *event)
3048 subcode = EFX_QWORD_FIELD(*event, ESF_DZ_DRV_SUB_CODE);
3055 /* event queue init complete. ok. */
3059 "channel %d unknown driver event type %d"
3062 EFX_QWORD_VAL(*event));
3068 efx_qword_t *event)
3073 subcode = EFX_QWORD_FIELD(*event, EFX_DWORD_0);
3088 "channel %d unknown driver event type %u"
3091 EFX_QWORD_VAL(*event));
3100 efx_qword_t event, *p_event;
3113 event = *p_event;
3115 if (!efx_event_present(&event))
3122 ev_code = EFX_QWORD_FIELD(event, ESF_DZ_EV_CODE);
3125 "processing event on %d " EFX_QWORD_FMT "\n",
3126 channel->channel, EFX_QWORD_VAL(event));
3130 efx_mcdi_process_event(channel, &event);
3133 spent += efx_ef10_handle_rx_event(channel, &event);
3135 /* XXX can we split a merged event to
3143 spent_tx += efx_ef10_handle_tx_event(channel, &event);
3150 efx_ef10_handle_driver_event(channel, &event);
3155 efx_ef10_handle_driver_generated_event(channel, &event);
3159 "channel %d unknown event type %d"
3162 EFX_QWORD_VAL(event));
3209 efx_qword_t event;
3212 EFX_POPULATE_QWORD_2(event,
3221 memcpy(MCDI_PTR(inbuf, DRIVER_EVENT_IN_DATA), &event.u64[0],