Lines Matching defs:efx
42 static int efx_ef10_set_udp_tnl_ports(struct efx_nic *efx, bool unloading);
45 static int efx_ef10_get_warm_boot_count(struct efx_nic *efx)
49 efx_readd(efx, ®, ER_DZ_BIU_MC_SFT_STATUS);
58 static unsigned int efx_ef10_pf_mem_bar(struct efx_nic *efx)
60 switch (efx->pci_dev->device) {
69 static unsigned int efx_ef10_vf_mem_bar(struct efx_nic *efx)
74 static unsigned int efx_ef10_mem_map_size(struct efx_nic *efx)
78 bar = efx->type->mem_bar(efx);
79 return resource_size(&efx->pci_dev->resource[bar]);
82 static bool efx_ef10_is_vf(struct efx_nic *efx)
84 return efx->type->is_vf;
88 static int efx_ef10_get_vf_index(struct efx_nic *efx)
91 struct efx_ef10_nic_data *nic_data = efx->nic_data;
95 rc = efx_mcdi_rpc(efx, MC_CMD_GET_FUNCTION_INFO, NULL, 0, outbuf,
107 static int efx_ef10_init_datapath_caps(struct efx_nic *efx)
110 struct efx_ef10_nic_data *nic_data = efx->nic_data;
116 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CAPABILITIES, NULL, 0,
121 netif_err(efx, drv, efx->net_dev,
148 netif_err(efx, probe, efx->net_dev,
157 rc = efx_mcdi_window_mode_to_stride(efx, vi_window_mode);
162 netif_dbg(efx, probe, efx->net_dev,
164 efx->vi_stride);
168 efx->num_mac_stats = MCDI_WORD(outbuf,
170 netif_dbg(efx, probe, efx->net_dev,
172 efx->num_mac_stats);
175 netif_dbg(efx, probe, efx->net_dev,
177 efx->num_mac_stats);
183 static void efx_ef10_read_licensed_features(struct efx_nic *efx)
187 struct efx_ef10_nic_data *nic_data = efx->nic_data;
193 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_LICENSING_V3, inbuf, sizeof(inbuf),
202 static int efx_ef10_get_sysclk_freq(struct efx_nic *efx)
207 rc = efx_mcdi_rpc(efx, MC_CMD_GET_CLOCK, NULL, 0,
215 static int efx_ef10_get_timer_workarounds(struct efx_nic *efx)
217 struct efx_ef10_nic_data *nic_data = efx->nic_data;
225 rc = efx_mcdi_get_workarounds(efx, &implemented, &enabled);
241 rc = efx_mcdi_set_workaround(efx,
251 netif_dbg(efx, probe, efx->net_dev,
254 netif_dbg(efx, probe, efx->net_dev,
261 static void efx_ef10_process_timer_config(struct efx_nic *efx,
266 if (EFX_EF10_WORKAROUND_61265(efx)) {
267 efx->timer_quantum_ns = MCDI_DWORD(data,
269 efx->timer_max_ns = MCDI_DWORD(data,
271 } else if (EFX_EF10_WORKAROUND_35388(efx)) {
272 efx->timer_quantum_ns = MCDI_DWORD(data,
276 efx->timer_max_ns = max_count * efx->timer_quantum_ns;
278 efx->timer_quantum_ns = MCDI_DWORD(data,
282 efx->timer_max_ns = max_count * efx->timer_quantum_ns;
285 netif_dbg(efx, probe, efx->net_dev,
287 efx->timer_quantum_ns, efx->timer_max_ns);
290 static int efx_ef10_get_timer_config(struct efx_nic *efx)
295 rc = efx_ef10_get_timer_workarounds(efx);
299 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_EVQ_TMR_PROPERTIES, NULL, 0,
303 efx_ef10_process_timer_config(efx, outbuf);
308 rc = efx_ef10_get_sysclk_freq(efx);
313 efx->timer_quantum_ns = quantum;
314 efx->timer_max_ns = efx->type->timer_period_max * quantum;
317 efx_mcdi_display_error(efx, MC_CMD_GET_EVQ_TMR_PROPERTIES,
325 static int efx_ef10_get_mac_address_pf(struct efx_nic *efx, u8 *mac_address)
333 rc = efx_mcdi_rpc(efx, MC_CMD_GET_MAC_ADDRESSES, NULL, 0,
345 static int efx_ef10_get_mac_address_vf(struct efx_nic *efx, u8 *mac_address)
354 rc = efx_mcdi_rpc(efx, MC_CMD_VPORT_GET_MAC_ADDRESSES, inbuf,
377 struct efx_nic *efx = dev_get_drvdata(dev);
380 ((efx->mcdi->fn_flags) &
389 struct efx_nic *efx = dev_get_drvdata(dev);
392 ((efx->mcdi->fn_flags) &
397 static struct efx_ef10_vlan *efx_ef10_find_vlan(struct efx_nic *efx, u16 vid)
399 struct efx_ef10_nic_data *nic_data = efx->nic_data;
412 static int efx_ef10_add_vlan(struct efx_nic *efx, u16 vid)
414 struct efx_ef10_nic_data *nic_data = efx->nic_data;
420 vlan = efx_ef10_find_vlan(efx, vid);
427 netif_warn(efx, drv, efx->net_dev,
442 if (efx->filter_state) {
443 mutex_lock(&efx->mac_lock);
444 down_write(&efx->filter_sem);
445 rc = efx_mcdi_filter_add_vlan(efx, vlan->vid);
446 up_write(&efx->filter_sem);
447 mutex_unlock(&efx->mac_lock);
465 static void efx_ef10_del_vlan_internal(struct efx_nic *efx,
468 struct efx_ef10_nic_data *nic_data = efx->nic_data;
472 if (efx->filter_state) {
473 down_write(&efx->filter_sem);
474 efx_mcdi_filter_del_vlan(efx, vlan->vid);
475 up_write(&efx->filter_sem);
482 static int efx_ef10_del_vlan(struct efx_nic *efx, u16 vid)
484 struct efx_ef10_nic_data *nic_data = efx->nic_data;
497 vlan = efx_ef10_find_vlan(efx, vid);
499 netif_err(efx, drv, efx->net_dev,
503 efx_ef10_del_vlan_internal(efx, vlan);
511 static void efx_ef10_cleanup_vlans(struct efx_nic *efx)
513 struct efx_ef10_nic_data *nic_data = efx->nic_data;
518 efx_ef10_del_vlan_internal(efx, vlan);
525 static int efx_ef10_probe(struct efx_nic *efx)
533 efx->nic_data = nic_data;
538 rc = efx_nic_alloc_buffer(efx, &nic_data->mcdi_buf,
548 rc = efx_ef10_get_warm_boot_count(efx);
562 _efx_writed(efx, cpu_to_le32(1), ER_DZ_MC_DB_HWRD);
564 rc = efx_mcdi_init(efx);
574 rc = efx_mcdi_reset(efx, RESET_TYPE_ALL);
579 rc = efx_mcdi_log_ctrl(efx, true, false, 0);
583 rc = device_create_file(&efx->pci_dev->dev,
588 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_primary_flag);
592 rc = efx_get_pf_index(efx, &nic_data->pf_index);
596 rc = efx_ef10_init_datapath_caps(efx);
600 efx_ef10_read_licensed_features(efx);
608 efx->tx_queues_per_channel = 4;
610 efx->tx_queues_per_channel = 2;
611 efx->max_vis = efx_ef10_mem_map_size(efx) / efx->vi_stride;
612 if (!efx->max_vis) {
613 netif_err(efx, drv, efx->net_dev, "error determining max VIs\n");
617 efx->max_channels = min_t(unsigned int, EFX_MAX_CHANNELS,
618 efx->max_vis / efx->tx_queues_per_channel);
619 efx->max_tx_channels = efx->max_channels;
620 if (WARN_ON(efx->max_channels == 0)) {
625 efx->rx_packet_len_offset =
630 efx->net_dev->hw_features |= NETIF_F_RXFCS;
632 rc = efx_mcdi_port_get_number(efx);
635 efx->port_num = rc;
637 rc = efx->type->get_mac_address(efx, efx->net_dev->perm_addr);
641 rc = efx_ef10_get_timer_config(efx);
645 rc = efx_mcdi_mon_probe(efx);
649 efx_ptp_defer_probe_with_channel(efx);
652 if ((efx->pci_dev->physfn) && (!efx->pci_dev->is_physfn)) {
653 struct pci_dev *pci_dev_pf = efx->pci_dev->physfn;
659 ether_addr_copy(nic_data->port_id, efx->net_dev->perm_addr);
665 rc = efx_ef10_add_vlan(efx, EFX_FILTER_VID_UNSPEC);
673 rc = efx_ef10_add_vlan(efx, 0);
679 efx->mcdi->fn_flags &
681 efx->net_dev->udp_tunnel_nic_info = &efx_ef10_udp_tunnels;
686 efx_ef10_cleanup_vlans(efx);
689 efx_ptp_remove(efx);
690 efx_mcdi_mon_remove(efx);
692 device_remove_file(&efx->pci_dev->dev, &dev_attr_primary_flag);
694 device_remove_file(&efx->pci_dev->dev, &dev_attr_link_control_flag);
696 efx_mcdi_detach(efx);
700 (void)efx_ef10_set_udp_tnl_ports(efx, true);
704 efx_mcdi_fini(efx);
706 efx_nic_free_buffer(efx, &nic_data->mcdi_buf);
709 efx->nic_data = NULL;
715 static void efx_ef10_free_piobufs(struct efx_nic *efx)
717 struct efx_ef10_nic_data *nic_data = efx->nic_data;
727 rc = efx_mcdi_rpc(efx, MC_CMD_FREE_PIOBUF, inbuf, sizeof(inbuf),
735 static int efx_ef10_alloc_piobufs(struct efx_nic *efx, unsigned int n)
737 struct efx_ef10_nic_data *nic_data = efx->nic_data;
746 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_ALLOC_PIOBUF, NULL, 0,
752 if (!(efx_ef10_is_vf(efx) && rc == -ENOSPC))
753 efx_mcdi_display_error(efx, MC_CMD_ALLOC_PIOBUF,
763 netif_dbg(efx, probe, efx->net_dev,
770 efx_ef10_free_piobufs(efx);
774 static int efx_ef10_link_piobufs(struct efx_nic *efx)
776 struct efx_ef10_nic_data *nic_data = efx->nic_data;
792 rc = efx_mcdi_rpc(efx, MC_CMD_LINK_PIOBUF,
796 netif_err(efx, drv, efx->net_dev,
802 netif_dbg(efx, probe, efx->net_dev,
808 efx_for_each_channel(channel, efx) {
813 channel->channel >= efx->xdp_channel_offset)
821 offset = ((efx->tx_channel_offset + efx->n_tx_channels -
842 rc = efx_mcdi_rpc(efx, MC_CMD_LINK_PIOBUF,
851 netif_err(efx, drv, efx->net_dev,
858 index * efx->vi_stride + offset;
860 netif_dbg(efx, probe, efx->net_dev,
879 efx_mcdi_rpc(efx, MC_CMD_UNLINK_PIOBUF,
886 static void efx_ef10_forget_old_piobufs(struct efx_nic *efx)
892 efx_for_each_channel(channel, efx)
899 static int efx_ef10_alloc_piobufs(struct efx_nic *efx, unsigned int n)
904 static int efx_ef10_link_piobufs(struct efx_nic *efx)
909 static void efx_ef10_free_piobufs(struct efx_nic *efx)
913 static void efx_ef10_forget_old_piobufs(struct efx_nic *efx)
919 static void efx_ef10_remove(struct efx_nic *efx)
921 struct efx_ef10_nic_data *nic_data = efx->nic_data;
930 if (efx->pci_dev->is_virtfn) {
931 pci_dev_pf = efx->pci_dev->physfn;
936 vf->efx = NULL;
938 netif_info(efx, drv, efx->net_dev,
943 efx_ef10_cleanup_vlans(efx);
946 efx_ptp_remove(efx);
948 efx_mcdi_mon_remove(efx);
950 efx_mcdi_rx_free_indir_table(efx);
955 rc = efx_mcdi_free_vis(efx);
959 efx_ef10_free_piobufs(efx);
961 device_remove_file(&efx->pci_dev->dev, &dev_attr_primary_flag);
962 device_remove_file(&efx->pci_dev->dev, &dev_attr_link_control_flag);
964 efx_mcdi_detach(efx);
968 (void)efx_ef10_set_udp_tnl_ports(efx, true);
973 efx_mcdi_fini(efx);
974 efx_nic_free_buffer(efx, &nic_data->mcdi_buf);
978 static int efx_ef10_probe_pf(struct efx_nic *efx)
980 return efx_ef10_probe(efx);
983 int efx_ef10_vadaptor_query(struct efx_nic *efx, unsigned int port_id,
987 struct efx_ef10_nic_data *nic_data = efx->nic_data;
998 rc = efx_mcdi_rpc(efx, MC_CMD_VADAPTOR_QUERY, inbuf, sizeof(inbuf),
1022 int efx_ef10_vadaptor_alloc(struct efx_nic *efx, unsigned int port_id)
1027 return efx_mcdi_rpc(efx, MC_CMD_VADAPTOR_ALLOC, inbuf, sizeof(inbuf),
1031 int efx_ef10_vadaptor_free(struct efx_nic *efx, unsigned int port_id)
1036 return efx_mcdi_rpc(efx, MC_CMD_VADAPTOR_FREE, inbuf, sizeof(inbuf),
1040 int efx_ef10_vport_add_mac(struct efx_nic *efx,
1048 return efx_mcdi_rpc(efx, MC_CMD_VPORT_ADD_MAC_ADDRESS, inbuf,
1052 int efx_ef10_vport_del_mac(struct efx_nic *efx,
1060 return efx_mcdi_rpc(efx, MC_CMD_VPORT_DEL_MAC_ADDRESS, inbuf,
1065 static int efx_ef10_probe_vf(struct efx_nic *efx)
1075 pci_dev_pf = efx->pci_dev->physfn;
1081 netif_info(efx, drv, efx->net_dev,
1088 rc = efx_ef10_probe(efx);
1092 rc = efx_ef10_get_vf_index(efx);
1096 if (efx->pci_dev->is_virtfn) {
1097 if (efx->pci_dev->physfn) {
1099 pci_get_drvdata(efx->pci_dev->physfn);
1101 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1103 nic_data_p->vf[nic_data->vf_index].efx = efx;
1105 efx->pci_dev;
1107 netif_info(efx, drv, efx->net_dev,
1114 efx_ef10_remove(efx);
1118 static int efx_ef10_probe_vf(struct efx_nic *efx __attribute__ ((unused)))
1124 static int efx_ef10_alloc_vis(struct efx_nic *efx,
1127 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1129 return efx_mcdi_alloc_vis(efx, min_vis, max_vis, &nic_data->vi_base,
1136 static int efx_ef10_dimension_resources(struct efx_nic *efx)
1138 unsigned int min_vis = max_t(unsigned int, efx->tx_queues_per_channel,
1141 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1146 channel_vis = max(efx->n_channels,
1147 ((efx->n_tx_channels + efx->n_extra_tx_channels) *
1148 efx->tx_queues_per_channel) +
1149 efx->n_xdp_channels * efx->xdp_tx_per_channel);
1150 if (efx->max_vis && efx->max_vis < channel_vis) {
1151 netif_dbg(efx, drv, efx->net_dev,
1153 channel_vis, efx->max_vis);
1154 channel_vis = efx->max_vis;
1166 efx->n_tx_channels) {
1168 DIV_ROUND_UP(efx->n_tx_channels,
1171 rc = efx_ef10_alloc_piobufs(efx, n_piobufs);
1173 netif_dbg(efx, probe, efx->net_dev,
1176 netif_dbg(efx, probe, efx->net_dev,
1179 netif_err(efx, probe, efx->net_dev,
1182 netif_dbg(efx, probe, efx->net_dev,
1199 uc_mem_map_size = PAGE_ALIGN((channel_vis - 1) * efx->vi_stride +
1205 pio_write_vi_base = uc_mem_map_size / efx->vi_stride;
1208 efx->vi_stride) -
1218 rc = efx_mcdi_free_vis(efx);
1222 rc = efx_ef10_alloc_vis(efx, min_vis, max_vis);
1227 netif_info(efx, drv, efx->net_dev,
1235 efx->max_channels = nic_data->n_allocated_vis;
1236 efx->max_tx_channels =
1237 nic_data->n_allocated_vis / efx->tx_queues_per_channel;
1239 efx_mcdi_free_vis(efx);
1249 netif_dbg(efx, probe, efx->net_dev,
1252 efx_ef10_free_piobufs(efx);
1256 membase = ioremap(efx->membase_phys, uc_mem_map_size);
1258 netif_err(efx, probe, efx->net_dev,
1263 iounmap(efx->membase);
1264 efx->membase = membase;
1268 nic_data->wc_membase = ioremap_wc(efx->membase_phys +
1272 netif_err(efx, probe, efx->net_dev,
1280 (pio_write_vi_base * efx->vi_stride + ER_DZ_TX_PIOBUF -
1283 rc = efx_ef10_link_piobufs(efx);
1285 efx_ef10_free_piobufs(efx);
1288 netif_dbg(efx, probe, efx->net_dev,
1290 &efx->membase_phys, efx->membase, uc_mem_map_size,
1296 static void efx_ef10_fini_nic(struct efx_nic *efx)
1298 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1300 spin_lock_bh(&efx->stats_lock);
1303 spin_unlock_bh(&efx->stats_lock);
1306 static int efx_ef10_init_nic(struct efx_nic *efx)
1308 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1309 struct net_device *net_dev = efx->net_dev;
1314 rc = efx_ef10_init_datapath_caps(efx);
1320 if (efx->must_realloc_vis) {
1322 rc = efx_ef10_alloc_vis(efx, nic_data->n_allocated_vis,
1326 efx->must_realloc_vis = false;
1329 nic_data->mc_stats = kmalloc(efx->num_mac_stats * sizeof(__le64),
1335 rc = efx_ef10_alloc_piobufs(efx, nic_data->n_piobufs);
1337 rc = efx_ef10_link_piobufs(efx);
1339 efx_ef10_free_piobufs(efx);
1347 netif_dbg(efx, drv, efx->net_dev,
1350 netif_err(efx, drv, efx->net_dev,
1356 if (efx_has_cap(efx, VXLAN_NVGRE) && !efx_ef10_is_vf(efx))
1365 if (efx_has_cap(efx, TX_TSO_V2_ENCAP)) {
1381 rc = efx->type->rx_push_rss_config(efx, false,
1382 efx->rss_context.rx_indir_table, NULL);
1387 static void efx_ef10_table_reset_mc_allocations(struct efx_nic *efx)
1389 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1395 efx->must_realloc_vis = true;
1396 efx_mcdi_filter_table_reset_mc_allocations(efx);
1398 efx_ef10_forget_old_piobufs(efx);
1399 efx->rss_context.context_id = EFX_MCDI_RSS_CONTEXT_INVALID;
1403 efx->vport_id = EVB_PORT_ID_ASSIGNED;
1406 for (i = 0; i < efx->vf_count; i++)
1449 static int efx_ef10_reset(struct efx_nic *efx, enum reset_type reset_type)
1451 int rc = efx_mcdi_reset(efx, reset_type);
1467 efx_ef10_table_reset_mc_allocations(efx);
1687 static u64 efx_ef10_raw_stat_mask(struct efx_nic *efx)
1690 u32 port_caps = efx_mcdi_phy_get_caps(efx);
1691 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1693 if (!(efx->mcdi->fn_flags &
1714 static void efx_ef10_get_stat_mask(struct efx_nic *efx, unsigned long *mask)
1716 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1719 raw_mask[0] = efx_ef10_raw_stat_mask(efx);
1730 if (efx->num_mac_stats >= MC_CMD_MAC_NSTATS_V2)
1737 if (efx->num_mac_stats >= MC_CMD_MAC_NSTATS_V3 &&
1754 static size_t efx_ef10_describe_stats(struct efx_nic *efx, u8 *names)
1758 efx_ef10_get_stat_mask(efx, mask);
1763 static void efx_ef10_get_fec_stats(struct efx_nic *efx,
1767 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1770 efx_ef10_get_stat_mask(efx, mask);
1779 static size_t efx_ef10_update_stats_common(struct efx_nic *efx, u64 *full_stats,
1783 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1787 efx_ef10_get_stat_mask(efx, mask);
1848 static size_t efx_ef10_update_stats_pf(struct efx_nic *efx, u64 *full_stats,
1851 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1855 efx_ef10_get_stat_mask(efx, mask);
1861 efx_nic_copy_stats(efx, nic_data->mc_stats);
1867 efx_nic_fix_nodesc_drop_stat(efx,
1888 efx_update_sw_stats(efx, stats);
1890 return efx_ef10_update_stats_common(efx, full_stats, core_stats);
1893 static int efx_ef10_try_update_nic_stats_vf(struct efx_nic *efx)
1894 __must_hold(&efx->stats_lock)
1897 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1901 u32 dma_len = efx->num_mac_stats * sizeof(u64);
1906 spin_unlock_bh(&efx->stats_lock);
1908 efx_ef10_get_stat_mask(efx, mask);
1910 rc = efx_nic_alloc_buffer(efx, &stats_buf, dma_len, GFP_KERNEL);
1912 spin_lock_bh(&efx->stats_lock);
1917 dma_stats[efx->num_mac_stats - 1] = EFX_MC_STATS_GENERATION_INVALID;
1925 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf),
1927 spin_lock_bh(&efx->stats_lock);
1930 if (rc != -ENOENT || atomic_read(&efx->active_queues))
1931 efx_mcdi_display_error(efx, MC_CMD_MAC_STATS,
1936 generation_end = dma_stats[efx->num_mac_stats - 1];
1951 efx_update_sw_stats(efx, stats);
1954 spin_unlock_bh(&efx->stats_lock);
1955 efx_nic_free_buffer(efx, &stats_buf);
1956 spin_lock_bh(&efx->stats_lock);
1960 static size_t efx_ef10_update_stats_vf(struct efx_nic *efx, u64 *full_stats,
1963 if (efx_ef10_try_update_nic_stats_vf(efx))
1966 return efx_ef10_update_stats_common(efx, full_stats, core_stats);
1969 static size_t efx_ef10_update_stats_atomic_vf(struct efx_nic *efx, u64 *full_stats,
1972 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1977 efx_update_sw_stats(efx, nic_data->stats);
1978 return efx_ef10_update_stats_common(efx, full_stats, core_stats);
1983 struct efx_nic *efx = channel->efx;
1995 if (EFX_EF10_WORKAROUND_61265(efx)) {
2005 efx_mcdi_rpc_async(efx, MC_CMD_SET_EVQ_TMR,
2007 } else if (EFX_EF10_WORKAROUND_35388(efx)) {
2008 unsigned int ticks = efx_usecs_to_ticks(efx, usecs);
2014 efx_writed_page(efx, &timer_cmd, ER_DD_EVQ_INDIRECT,
2017 unsigned int ticks = efx_usecs_to_ticks(efx, usecs);
2022 efx_writed_page(efx, &timer_cmd, ER_DZ_EVQ_TMR,
2027 static void efx_ef10_get_wol_vf(struct efx_nic *efx,
2030 static int efx_ef10_set_wol_vf(struct efx_nic *efx, u32 type)
2035 static void efx_ef10_get_wol(struct efx_nic *efx, struct ethtool_wolinfo *wol)
2042 static int efx_ef10_set_wol(struct efx_nic *efx, u32 type)
2049 static void efx_ef10_mcdi_request(struct efx_nic *efx,
2053 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2066 _efx_writed(efx, cpu_to_le32((u64)nic_data->mcdi_buf.dma_addr >> 32),
2068 _efx_writed(efx, cpu_to_le32((u32)nic_data->mcdi_buf.dma_addr),
2072 static bool efx_ef10_mcdi_poll_response(struct efx_nic *efx)
2074 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2082 efx_ef10_mcdi_read_response(struct efx_nic *efx, efx_dword_t *outbuf,
2085 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2091 static void efx_ef10_mcdi_reboot_detected(struct efx_nic *efx)
2093 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2096 efx_ef10_table_reset_mc_allocations(efx);
2107 static int efx_ef10_mcdi_poll_reboot(struct efx_nic *efx)
2109 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2112 rc = efx_ef10_get_warm_boot_count(efx);
2126 efx_ef10_mcdi_reboot_detected(efx);
2141 struct efx_nic *efx = context->efx;
2143 netif_vdbg(efx, intr, efx->net_dev,
2146 if (likely(READ_ONCE(efx->irq_soft_enabled))) {
2148 if (context->index == efx->irq_level)
2149 efx->last_irq_cpu = raw_smp_processor_id();
2152 efx_schedule_channel_irq(efx->channel[context->index]);
2160 struct efx_nic *efx = dev_id;
2161 bool soft_enabled = READ_ONCE(efx->irq_soft_enabled);
2167 efx_readd(efx, ®, ER_DZ_BIU_INT_ISR);
2175 if (queues & (1U << efx->irq_level))
2176 efx->last_irq_cpu = raw_smp_processor_id();
2178 efx_for_each_channel(channel, efx) {
2185 netif_vdbg(efx, intr, efx->net_dev,
2192 static int efx_ef10_irq_test_generate(struct efx_nic *efx)
2196 if (efx_mcdi_set_workaround(efx, MC_CMD_WORKAROUND_BUG41750, true,
2202 MCDI_SET_DWORD(inbuf, TRIGGER_INTERRUPT_IN_INTR_LEVEL, efx->irq_level);
2203 return efx_mcdi_rpc(efx, MC_CMD_TRIGGER_INTERRUPT,
2212 return efx_nic_alloc_buffer(tx_queue->efx, &tx_queue->txd,
2228 efx_writeo_page(tx_queue->efx, ®,
2327 static u32 efx_ef10_tso_versions(struct efx_nic *efx)
2329 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2346 struct efx_nic *efx = tx_queue->efx;
2351 nic_data = efx->nic_data;
2360 if (efx->type->ptp_set_ts_sync_events)
2361 efx->type->ptp_set_ts_sync_events(efx, false, false);
2370 if (efx_has_cap(efx, TX_TSO_V2)) {
2374 netif_dbg(efx, hw, efx->net_dev, "Using TSOv2 for channel %u\n",
2377 } else if (efx_has_cap(efx, TX_TSO)) {
2405 if (tx_queue->tso_version == 2 && efx_has_cap(efx, TX_TSO_V2_ENCAP))
2414 netdev_WARN(efx->net_dev, "failed to initialise TXQ %d\n",
2426 efx_writed_page(tx_queue->efx, ®,
2496 static int efx_ef10_probe_multicast_chaining(struct efx_nic *efx)
2498 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2503 rc = efx_mcdi_get_workarounds(efx, &implemented, &enabled);
2521 rc = efx_mcdi_set_workaround(efx,
2527 netif_info(efx, drv, efx->net_dev,
2537 rc = efx_ef10_get_warm_boot_count(efx);
2551 static int efx_ef10_filter_table_probe(struct efx_nic *efx)
2553 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2554 int rc = efx_ef10_probe_multicast_chaining(efx);
2559 down_write(&efx->filter_sem);
2560 rc = efx_mcdi_filter_table_probe(efx, nic_data->workaround_26807);
2566 rc = efx_mcdi_filter_add_vlan(efx, vlan->vid);
2573 efx_mcdi_filter_table_remove(efx);
2575 up_write(&efx->filter_sem);
2579 static void efx_ef10_filter_table_remove(struct efx_nic *efx)
2581 down_write(&efx->filter_sem);
2582 efx_mcdi_filter_table_remove(efx);
2583 up_write(&efx->filter_sem);
2602 struct efx_nic *efx = rx_queue->efx;
2620 efx_writed_page(efx, ®, ER_DZ_RX_DESC_UPD,
2644 efx_mcdi_rpc_async(channel->efx, MC_CMD_DRIVER_EVENT,
2650 efx_ef10_rx_defer_refill_complete(struct efx_nic *efx, unsigned long cookie,
2659 struct efx_nic *efx = channel->efx;
2663 nic_data = efx->nic_data;
2674 struct efx_nic *efx = rx_queue->efx;
2676 netif_info(efx, hw, efx->net_dev,
2680 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
2688 struct efx_nic *efx = rx_queue->efx;
2690 netif_info(efx, hw, efx->net_dev,
2694 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
2702 netif_dbg(rx_queue->efx, hw, rx_queue->efx->net_dev,
2724 struct efx_nic *efx = channel->efx;
2728 if (!(efx->net_dev->features & NETIF_F_RXALL)) {
2729 if (!efx->loopback_selftest)
2741 netdev_WARN(efx->net_dev,
2745 if (!efx->loopback_selftest)
2757 netdev_WARN(efx->net_dev,
2761 if (!efx->loopback_selftest)
2769 netdev_WARN(efx->net_dev,
2777 netdev_WARN(efx->net_dev,
2781 if (!efx->loopback_selftest)
2787 netdev_WARN(efx->net_dev,
2795 netdev_WARN(efx->net_dev,
2799 if (!efx->loopback_selftest)
2814 struct efx_nic *efx = channel->efx;
2815 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2821 if (unlikely(READ_ONCE(efx->reset_pending)))
2838 netdev_WARN(efx->net_dev, "saw RX_DROP_EVENT: event="
2851 struct efx_ef10_nic_data *nic_data = efx->nic_data;
2856 netdev_WARN(efx->net_dev,
2922 netdev_WARN(efx->net_dev,
2963 struct efx_nic *efx = channel->efx;
2971 if (unlikely(READ_ONCE(efx->reset_pending)))
3031 netif_err(efx, hw, efx->net_dev,
3045 struct efx_nic *efx = channel->efx;
3058 netif_err(efx, hw, efx->net_dev,
3070 struct efx_nic *efx = channel->efx;
3087 netif_err(efx, hw, efx->net_dev,
3099 struct efx_nic *efx = channel->efx;
3124 netif_vdbg(efx, drv, efx->net_dev,
3158 netif_err(efx, hw, efx->net_dev,
3173 struct efx_nic *efx = channel->efx;
3176 if (EFX_EF10_WORKAROUND_35388(efx)) {
3188 efx_writed_page(efx, &rptr, ER_DD_EVQ_INDIRECT,
3195 efx_writed_page(efx, &rptr, ER_DD_EVQ_INDIRECT,
3201 efx_writed_page(efx, &rptr, ER_DZ_EVQ_RPTR, channel->channel);
3208 struct efx_nic *efx = channel->efx;
3224 rc = efx_mcdi_rpc(efx, MC_CMD_DRIVER_EVENT, inbuf, sizeof(inbuf),
3233 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
3236 static void efx_ef10_prepare_flr(struct efx_nic *efx)
3238 atomic_set(&efx->active_queues, 0);
3241 static int efx_ef10_vport_set_mac_address(struct efx_nic *efx)
3243 struct efx_ef10_nic_data *nic_data = efx->nic_data;
3251 efx_device_detach_sync(efx);
3252 efx_net_stop(efx->net_dev);
3253 efx_ef10_filter_table_remove(efx);
3255 rc = efx_ef10_vadaptor_free(efx, efx->vport_id);
3260 rc = efx_ef10_vport_del_mac(efx, efx->vport_id,
3265 rc = efx_ef10_vport_add_mac(efx, efx->vport_id,
3266 efx->net_dev->dev_addr);
3268 ether_addr_copy(nic_data->vport_mac, efx->net_dev->dev_addr);
3270 rc2 = efx_ef10_vport_add_mac(efx, efx->vport_id, mac_old);
3279 rc2 = efx_ef10_vadaptor_alloc(efx, efx->vport_id);
3283 rc2 = efx_ef10_filter_table_probe(efx);
3287 rc2 = efx_net_open(efx->net_dev);
3291 efx_device_attach_if_not_resetting(efx);
3296 netif_err(efx, drv, efx->net_dev,
3298 efx_schedule_reset(efx, RESET_TYPE_DATAPATH);
3303 static int efx_ef10_set_mac_address(struct efx_nic *efx)
3306 bool was_enabled = efx->port_enabled;
3313 if (efx->pci_dev->is_virtfn && efx->pci_dev->physfn) {
3314 struct efx_nic *efx_pf = pci_get_drvdata(efx->pci_dev->physfn);
3315 struct efx_ef10_nic_data *nic_data = efx->nic_data;
3321 ether_addr_copy(mac, efx->net_dev->dev_addr);
3327 netif_dbg(efx, drv, efx->net_dev,
3333 efx_device_detach_sync(efx);
3334 efx_net_stop(efx->net_dev);
3336 mutex_lock(&efx->mac_lock);
3337 efx_ef10_filter_table_remove(efx);
3340 efx->net_dev->dev_addr);
3342 efx->vport_id);
3343 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_VADAPTOR_SET_MAC, inbuf,
3346 efx_ef10_filter_table_probe(efx);
3347 mutex_unlock(&efx->mac_lock);
3350 efx_net_open(efx->net_dev);
3351 efx_device_attach_if_not_resetting(efx);
3354 netif_err(efx, drv, efx->net_dev,
3357 } else if (rc == -ENOSYS && !efx_ef10_is_vf(efx)) {
3363 rc = efx_ef10_vport_set_mac_address(efx);
3365 efx_mcdi_display_error(efx, MC_CMD_VADAPTOR_SET_MAC,
3372 static int efx_ef10_mac_reconfigure(struct efx_nic *efx, bool mtu_only)
3374 WARN_ON(!mutex_is_locked(&efx->mac_lock));
3376 efx_mcdi_filter_sync_rx_mode(efx);
3378 if (mtu_only && efx_has_cap(efx, SET_MAC_ENHANCED))
3379 return efx_mcdi_set_mtu(efx);
3380 return efx_mcdi_set_mac(efx);
3383 static int efx_ef10_start_bist(struct efx_nic *efx, u32 bist_type)
3388 return efx_mcdi_rpc(efx, MC_CMD_START_BIST, inbuf, sizeof(inbuf),
3396 static int efx_ef10_poll_bist(struct efx_nic *efx)
3403 rc = efx_mcdi_rpc(efx, MC_CMD_POLL_BIST, NULL, 0,
3414 netif_dbg(efx, hw, efx->net_dev, "BIST passed.\n");
3417 netif_err(efx, hw, efx->net_dev, "BIST timed out\n");
3420 netif_err(efx, hw, efx->net_dev, "BIST failed.\n");
3423 netif_err(efx, hw, efx->net_dev,
3429 static int efx_ef10_run_bist(struct efx_nic *efx, u32 bist_type)
3433 netif_dbg(efx, drv, efx->net_dev, "starting BIST type %u\n", bist_type);
3435 rc = efx_ef10_start_bist(efx, bist_type);
3439 return efx_ef10_poll_bist(efx);
3443 efx_ef10_test_chip(struct efx_nic *efx, struct efx_self_tests *tests)
3447 efx_reset_down(efx, RESET_TYPE_WORLD);
3449 rc = efx_mcdi_rpc(efx, MC_CMD_ENABLE_OFFLINE_BIST,
3454 tests->memory = efx_ef10_run_bist(efx, MC_CMD_MC_MEM_BIST) ? -1 : 1;
3455 tests->registers = efx_ef10_run_bist(efx, MC_CMD_REG_BIST) ? -1 : 1;
3457 rc = efx_mcdi_reset(efx, RESET_TYPE_WORLD);
3462 rc2 = efx_reset_up(efx, RESET_TYPE_WORLD, rc == 0);
3496 static int efx_ef10_mtd_probe_partition(struct efx_nic *efx,
3516 if (info->port != efx_port_num(efx))
3519 rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected);
3542 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_METADATA, inbuf, sizeof(inbuf),
3567 static int efx_ef10_mtd_probe(struct efx_nic *efx)
3579 rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_PARTITIONS, NULL, 0,
3599 rc = efx_ef10_mtd_probe_partition(efx, &parts[n_parts], type,
3613 rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts));
3622 static void efx_ef10_ptp_write_host_time(struct efx_nic *efx, u32 host_time)
3624 _efx_writed(efx, cpu_to_le32(host_time), ER_DZ_MC_DB_LWRD);
3627 static void efx_ef10_ptp_write_host_time_vf(struct efx_nic *efx,
3647 rc = efx_mcdi_rpc(channel->efx, MC_CMD_PTP,
3680 rc = efx_mcdi_rpc(channel->efx, MC_CMD_PTP,
3686 static int efx_ef10_ptp_set_ts_sync_events(struct efx_nic *efx, bool en,
3696 channel = efx_ptp_channel(efx);
3700 efx_ef10_ptp_set_ts_sync_events(efx, false, temp);
3708 static int efx_ef10_ptp_set_ts_config_vf(struct efx_nic *efx,
3714 static int efx_ef10_ptp_set_ts_config(struct efx_nic *efx,
3721 efx_ef10_ptp_set_ts_sync_events(efx, false, false);
3723 return efx_ptp_change_mode(efx,
3740 rc = efx_ptp_change_mode(efx, true, 0);
3742 rc = efx_ef10_ptp_set_ts_sync_events(efx, true, false);
3744 efx_ptp_change_mode(efx, false, 0);
3751 static int efx_ef10_get_phys_port_id(struct efx_nic *efx,
3754 struct efx_ef10_nic_data *nic_data = efx->nic_data;
3765 static int efx_ef10_vlan_rx_add_vid(struct efx_nic *efx, __be16 proto, u16 vid)
3770 return efx_ef10_add_vlan(efx, vid);
3773 static int efx_ef10_vlan_rx_kill_vid(struct efx_nic *efx, __be16 proto, u16 vid)
3778 return efx_ef10_del_vlan(efx, vid);
3786 static int efx_ef10_set_udp_tnl_ports(struct efx_nic *efx, bool unloading)
3788 struct efx_ef10_nic_data *nic_data = efx->nic_data;
3804 efx_device_attach_if_not_resetting(efx);
3841 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_SET_TUNNEL_ENCAP_UDP_PORTS,
3855 netif_warn(efx, drv, efx->net_dev,
3859 netif_info(efx, drv, efx->net_dev,
3876 efx_device_attach_if_not_resetting(efx);
3882 static int efx_ef10_udp_tnl_push_ports(struct efx_nic *efx)
3884 struct efx_ef10_nic_data *nic_data = efx->nic_data;
3892 efx_device_detach_sync(efx);
3893 rc = efx_ef10_set_udp_tnl_ports(efx, false);
3903 struct efx_nic *efx = efx_netdev_priv(dev);
3912 nic_data = efx->nic_data;
3921 efx_device_detach_sync(efx);
3924 rc = efx_ef10_set_udp_tnl_ports(efx, false);
3935 static bool efx_ef10_udp_tnl_has_port(struct efx_nic *efx, __be16 port)
3937 struct efx_ef10_nic_data *nic_data = efx->nic_data;
3963 struct efx_nic *efx = efx_netdev_priv(dev);
3967 nic_data = efx->nic_data;
3973 efx_device_detach_sync(efx);
3976 rc = efx_ef10_set_udp_tnl_ports(efx, false);
3998 static size_t efx_ef10_print_additional_fwver(struct efx_nic *efx, char *buf,
4001 struct efx_ef10_nic_data *nic_data = efx->nic_data;
4008 static unsigned int ef10_check_caps(const struct efx_nic *efx,
4012 const struct efx_ef10_nic_data *nic_data = efx->nic_data;
4024 static unsigned int efx_ef10_recycle_ring_size(const struct efx_nic *efx)
4031 switch (efx->pci_dev->device & 0xfff) {