Lines Matching defs:fifo
541 struct fifo_info *fifo, int cnt, u8 multiq)
545 if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no))
546 netif_wake_subqueue(fifo->dev, fifo->fifo_no);
547 } else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) {
548 if (netif_queue_stopped(fifo->dev)) {
549 fifo->queue_state = FIFO_QUEUE_START;
550 netif_wake_queue(fifo->dev);
612 struct fifo_info *fifo = &mac_control->fifos[i];
617 fifo->list_info = kzalloc(list_holder_size, GFP_KERNEL);
618 if (!fifo->list_info) {
627 struct fifo_info *fifo = &mac_control->fifos[i];
630 fifo->tx_curr_put_info.offset = 0;
631 fifo->tx_curr_put_info.fifo_len = tx_cfg->fifo_len - 1;
632 fifo->tx_curr_get_info.offset = 0;
633 fifo->tx_curr_get_info.fifo_len = tx_cfg->fifo_len - 1;
634 fifo->fifo_no = i;
635 fifo->nic = nic;
636 fifo->max_txds = MAX_SKB_FRAGS + 2;
637 fifo->dev = dev;
675 fifo->list_info[l].list_virt_addr =
677 fifo->list_info[l].list_phy_addr =
685 struct fifo_info *fifo = &mac_control->fifos[i];
689 fifo->ufo_in_band_v = kcalloc(size, sizeof(u64), GFP_KERNEL);
690 if (!fifo->ufo_in_band_v)
896 struct fifo_info *fifo = &mac_control->fifos[i];
904 if (!fifo->list_info)
907 fli = &fifo->list_info[mem_blks];
928 kfree(fifo->list_info);
985 struct fifo_info *fifo = &mac_control->fifos[i];
988 if (fifo->ufo_in_band_v) {
991 kfree(fifo->ufo_in_band_v);
2315 * @fifo_data: fifo data pointer
2380 struct fifo_info *fifo = &mac_control->fifos[i];
2383 spin_lock_irqsave(&fifo->tx_lock, flags);
2385 txdp = fifo->list_info[j].list_virt_addr;
2396 fifo->tx_curr_get_info.offset = 0;
2397 fifo->tx_curr_put_info.offset = 0;
2398 spin_unlock_irqrestore(&fifo->tx_lock, flags);
2986 * @fifo_data : fifo data pointer
4016 struct fifo_info *fifo = NULL;
4073 /* get fifo number based on skb->priority value */
4076 fifo = &mac_control->fifos[queue];
4078 spin_lock_irqsave(&fifo->tx_lock, flags);
4081 if (__netif_subqueue_stopped(dev, fifo->fifo_no)) {
4082 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4085 } else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) {
4087 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4092 put_off = (u16)fifo->tx_curr_put_info.offset;
4093 get_off = (u16)fifo->tx_curr_get_info.offset;
4094 txdp = fifo->list_info[put_off].list_virt_addr;
4096 queue_len = fifo->tx_curr_put_info.fifo_len + 1;
4101 s2io_stop_tx_queue(sp, fifo->fifo_no);
4103 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4119 txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
4154 val64 = fifo->list_info[put_off].list_phy_addr;
4165 if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
4167 fifo->tx_curr_put_info.offset = put_off;
4175 s2io_stop_tx_queue(sp, fifo->fifo_no);
4178 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4181 tx_intr_handler(fifo);
4187 s2io_stop_tx_queue(sp, fifo->fifo_no);
4190 spin_unlock_irqrestore(&fifo->tx_lock, flags);
7544 "one fifo. Disabling Tx steering.\n");
7989 struct fifo_info *fifo = &mac_control->fifos[i];
7991 spin_lock_init(&fifo->tx_lock);
8051 DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name,
8067 struct fifo_info *fifo = &mac_control->fifos[i];
8069 fifo->multiq = config->multiq;