Lines Matching defs:value
45 u32 tg_value; /* Current type-group value */
58 u32 value = (VCAP_CORE_UPDATE_CTRL_UPDATE_CMD(cmd) |
66 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_ENTRY_DIS;
69 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_ACTION_DIS;
72 value |= VCAP_CORE_UPDATE_CTRL_UPDATE_CNT_DIS;
74 ocelot_target_write(ocelot, vcap->target, value, VCAP_CORE_UPDATE_CTRL);
76 read_poll_timeout(vcap_read_update_ctrl, value,
77 (value & VCAP_CORE_UPDATE_CTRL_UPDATE_SHOT) == 0,
219 static void vcap_data_set(u32 *data, u32 offset, u32 len, u32 value)
226 if (value & (1 << i))
236 u32 i, v, m, value = 0;
242 value |= (1 << i);
244 return value;
248 u32 value, u32 mask)
250 vcap_data_set(data->entry, offset + data->key_offset, width, value);
255 int field, u32 value, u32 mask)
260 vcap_key_field_set(data, offset, length, value, mask);
269 u32 i, j, n = 0, value = 0, mask = 0;
281 value += (val[j] << n);
286 vcap_key_field_set(data, offset, n, value, mask);
288 value = 0;
303 vcap_key_field_set(data, offset, length, port->value, port->mask);
310 u32 value = (val == OCELOT_VCAP_BIT_1 ? 1 : 0);
317 vcap_key_field_set(data, offset, length, value, msk);
321 struct vcap_data *data, int field, u32 value)
327 value);
383 tag->vid.value, tag->vid.mask);
385 tag->pcp.value[0], tag->pcp.mask[0]);
394 etype->dmac.value, etype->dmac.mask);
396 etype->smac.value, etype->smac.mask);
398 etype->etype.value, etype->etype.mask);
408 etype->data.value, etype->data.mask);
416 llc->dmac.value, llc->dmac.mask);
418 llc->smac.value, llc->smac.mask);
420 payload.value[i] = llc->llc.value[i];
424 payload.value, payload.mask);
432 snap->dmac.value, snap->dmac.mask);
434 snap->smac.value, snap->smac.mask);
436 filter->key.snap.snap.value,
445 arp->smac.value, arp->smac.mask);
474 arp->dip.value.addr, arp->dip.mask.addr);
477 arp->sip.value.addr, arp->sip.mask.addr);
524 val = ipv6->sip.value[i + 8];
527 dip.value.addr[i] = val;
530 sip.value.addr[i - 4] = val;
557 ds.value, ds.mask);
559 dip.value.addr, dip.mask.addr);
561 sip.value.addr, sip.mask.addr);
564 val = proto.value[0];
607 payload.value[i] = ip_data->value[i];
613 proto.value, proto.mask);
616 payload.value, payload.mask);
699 tag->vid.value, tag->vid.mask);
701 tag->pcp.value[0], tag->pcp.mask[0]);
709 etype->smac.value, etype->smac.mask);
711 etype->etype.value, etype->etype.mask);
730 sip.value.addr, sip.mask.addr);
732 val = proto.value[0];
756 etype.value[0] = proto.value[0];
760 etype.value, etype.mask);
830 vcap_key_set(vcap, &data, VCAP_ES0_IGR_PORT, filter->ingress_port.value,
832 vcap_key_set(vcap, &data, VCAP_ES0_EGR_PORT, filter->egress_port.value,
837 tag->vid.value, tag->vid.mask);
839 tag->pcp.value[0], tag->pcp.mask[0]);
963 m = ocelot_mirror_get(ocelot, filter->egress_port.value,
1107 proto = ntohs(*(__be16 *)filter->key.etype.etype.value);
1375 * For this reason, we need to fix up the value that the hardware is