Lines Matching refs:x00
91 MLXSW_ITEM32(reg, sspr, m, 0x00, 31, 1);
98 MLXSW_ITEM32_LP(reg, sspr, 0x00, 16, 0x00, 12);
132 MLXSW_ITEM32(reg, sfdat, swid, 0x00, 24, 8);
170 MLXSW_ITEM32(reg, sfd, swid, 0x00, 24, 8);
237 MLXSW_REG_SFD_REC_LEN, 0x00, false);
251 MLXSW_REG_SFD_REC_LEN, 0x00, false);
269 MLXSW_REG_SFD_REC_LEN, 0x00, false);
278 MLXSW_REG_SFD_REC_LEN, 0x00, false);
598 MLXSW_ITEM32(reg, sfn, swid, 0x00, 24, 8);
629 MLXSW_REG_SFN_REC_LEN, 0x00, false);
651 MLXSW_REG_SFN_REC_LEN, 0x00, false);
773 MLXSW_ITEM32_LP(reg, spms, 0x00, 16, 0x00, 12);
818 MLXSW_ITEM32(reg, spvid, tport, 0x00, 24, 1);
825 MLXSW_ITEM32_LP(reg, spvid, 0x00, 16, 0x00, 12);
832 MLXSW_ITEM32(reg, spvid, sub_port, 0x00, 8, 8);
890 MLXSW_ITEM32(reg, spvm, pt, 0x00, 31, 1);
897 MLXSW_ITEM32(reg, spvm, pte, 0x00, 30, 1);
903 MLXSW_ITEM32_LP(reg, spvm, 0x00, 16, 0x00, 12);
910 MLXSW_ITEM32(reg, spvm, sub_port, 0x00, 8, 8);
916 MLXSW_ITEM32(reg, spvm, num_rec, 0x00, 0, 8);
986 MLXSW_ITEM32_LP(reg, spaft, 0x00, 16, 0x00, 12);
993 MLXSW_ITEM32(reg, spaft, sub_port, 0x00, 8, 8);
1049 MLXSW_ITEM32(reg, sfgc, type, 0x00, 0, 4);
1135 MLXSW_ITEM32(reg, sfdf, swid, 0x00, 24, 8);
1235 MLXSW_ITEM32(reg, sldr, op, 0x00, 29, 3);
1241 MLXSW_ITEM32(reg, sldr, lag_id, 0x00, 0, 10);
1313 MLXSW_ITEM32(reg, slcr, pp, 0x00, 24, 1);
1322 MLXSW_ITEM32_LP(reg, slcr, 0x00, 16, 0x00, 12);
1334 MLXSW_ITEM32(reg, slcr, type, 0x00, 0, 4);
1433 MLXSW_ITEM32(reg, slcor, col, 0x00, 30, 2);
1440 MLXSW_ITEM32_LP(reg, slcor, 0x00, 16, 0x00, 12);
1446 MLXSW_ITEM32(reg, slcor, lag_id, 0x00, 0, 10);
1508 MLXSW_ITEM32_LP(reg, spmlr, 0x00, 16, 0x00, 12);
1515 MLXSW_ITEM32(reg, spmlr, sub_port, 0x00, 8, 8);
1559 MLXSW_ITEM32(reg, svfa, swid, 0x00, 24, 8);
1567 MLXSW_ITEM32_LP(reg, svfa, 0x00, 16, 0x00, 12);
1583 MLXSW_ITEM32(reg, svfa, mapping_table, 0x00, 8, 3);
1592 MLXSW_ITEM32(reg, svfa, v, 0x00, 0, 1);
1708 MLXSW_ITEM32(reg, spvtr, tport, 0x00, 24, 1);
1715 MLXSW_ITEM32_LP(reg, spvtr, 0x00, 16, 0x00, 12);
1810 MLXSW_ITEM32_LP(reg, svpe, 0x00, 16, 0x00, 12);
1818 MLXSW_ITEM32(reg, svpe, vp_en, 0x00, 8, 1);
1848 MLXSW_ITEM32(reg, sfmr, op, 0x00, 24, 4);
1854 MLXSW_ITEM32(reg, sfmr, fid, 0x00, 0, 16);
1998 MLXSW_ITEM32_LP(reg, spvmlr, 0x00, 16, 0x00, 12);
2004 MLXSW_ITEM32(reg, spvmlr, num_rec, 0x00, 0, 8);
2012 31, 1, MLXSW_REG_SPVMLR_REC_LEN, 0x00, false);
2019 MLXSW_REG_SPVMLR_REC_LEN, 0x00, false);
2055 MLXSW_ITEM32_LP(reg, spfsr, 0x00, 16, 0x00, 12);
2092 MLXSW_ITEM32_LP(reg, spvc, 0x00, 16, 0x00, 12);
2187 MLXSW_ITEM32_LP(reg, spevet, 0x00, 16, 0x00, 12);
2221 MLXSW_ITEM32_LP(reg, smpe, 0x00, 16, 0x00, 12);
2260 MLXSW_ITEM32(reg, smid2, swid, 0x00, 24, 8);
2267 MLXSW_ITEM32(reg, smid2, mid, 0x00, 0, 16);
2326 MLXSW_ITEM32_LP(reg, cwtp, 0x00, 16, 0x00, 12);
2404 MLXSW_ITEM32_LP(reg, cwtpm, 0x00, 16, 0x00, 12);
2534 MLXSW_ITEM32(reg, ppbt, e, 0x00, 31, 1);
2544 MLXSW_ITEM32(reg, ppbt, op, 0x00, 28, 3);
2550 MLXSW_ITEM32_LP(reg, ppbt, 0x00, 16, 0x00, 12);
2593 MLXSW_ITEM32(reg, pacl, v, 0x00, 24, 1);
2643 MLXSW_ITEM32(reg, pagt, size, 0x00, 0, 8);
2658 MLXSW_ITEM32_INDEXED(reg, pagt, multi, 0x30, 31, 1, 0x04, 0x00, false);
2664 MLXSW_ITEM32_INDEXED(reg, pagt, acl_id, 0x30, 0, 16, 0x04, 0x00, false);
2711 MLXSW_ITEM32(reg, ptar, op, 0x00, 28, 4);
2718 MLXSW_ITEM32(reg, ptar, action_set_type, 0x00, 16, 8);
2729 MLXSW_ITEM32(reg, ptar, key_type, 0x00, 0, 8);
2766 MLXSW_REG_PTAR_KEY_ID_LEN, 0x00, false);
2806 MLXSW_ITEM32(reg, pprr, ipv4, 0x00, 31, 1);
2812 MLXSW_ITEM32(reg, pprr, ipv6, 0x00, 30, 1);
2818 MLXSW_ITEM32(reg, pprr, src, 0x00, 29, 1);
2824 MLXSW_ITEM32(reg, pprr, dst, 0x00, 28, 1);
2830 MLXSW_ITEM32(reg, pprr, tcp, 0x00, 27, 1);
2836 MLXSW_ITEM32(reg, pprr, udp, 0x00, 26, 1);
2843 MLXSW_ITEM32(reg, pprr, register_index, 0x00, 0, 8);
2920 MLXSW_ITEM32(reg, prcr, op, 0x00, 28, 4);
2926 MLXSW_ITEM32(reg, prcr, offset, 0x00, 0, 16);
2985 MLXSW_ITEM32(reg, pefa, index, 0x00, 0, 24);
3048 MLXSW_ITEM32(reg, pemrbt, protocol, 0x00, 0, 1);
3082 MLXSW_ITEM32(reg, ptce2, v, 0x00, 31, 1);
3089 MLXSW_ITEM32(reg, ptce2, a, 0x00, 30, 1);
3112 MLXSW_ITEM32(reg, ptce2, op, 0x00, 20, 3);
3117 MLXSW_ITEM32(reg, ptce2, offset, 0x00, 0, 16);
3187 MLXSW_ITEM32(reg, perpt, erpt_bank, 0x00, 16, 4);
3194 MLXSW_ITEM32(reg, perpt, erpt_index, 0x00, 0, 8);
3300 MLXSW_ITEM32(reg, perar, region_id, 0x00, 0, 16);
3340 MLXSW_ITEM32(reg, ptce3, v, 0x00, 31, 1);
3358 MLXSW_ITEM32(reg, ptce3, op, 0x00, 20, 3);
3503 MLXSW_ITEM32(reg, percr, region_id, 0x00, 0, 16);
3558 MLXSW_ITEM32(reg, pererp, region_id, 0x00, 0, 16);
3648 MLXSW_ITEM32(reg, peabfe, size, 0x00, 0, 9);
3658 MLXSW_REG_PEABFE_BF_REC_LEN, 0x00, false);
3667 MLXSW_REG_PEABFE_BF_REC_LEN, 0x00, false);
3676 MLXSW_REG_PEABFE_BF_REC_LEN, 0x00, false);
3715 MLXSW_ITEM32(reg, iedr, num_rec, 0x00, 0, 8);
3722 MLXSW_REG_IEDR_REC_LEN, 0x00, false);
3729 MLXSW_REG_IEDR_REC_LEN, 0x00, false);
3772 MLXSW_ITEM32_LP(reg, qpts, 0x00, 16, 0x00, 12);
3813 MLXSW_ITEM32(reg, qpcr, g, 0x00, 14, 2);
3819 MLXSW_ITEM32(reg, qpcr, pid, 0x00, 0, 14);
3976 MLXSW_ITEM32_LP(reg, qtct, 0x00, 16, 0x00, 12);
3983 MLXSW_ITEM32(reg, qtct, sub_port, 0x00, 8, 8);
3989 MLXSW_ITEM32(reg, qtct, switch_prio, 0x00, 0, 4);
4025 MLXSW_ITEM32_LP(reg, qeec, 0x00, 16, 0x00, 12);
4204 MLXSW_ITEM32_LP(reg, qrwe, 0x00, 16, 0x00, 12);
4245 MLXSW_ITEM32_LP(reg, qpdsm, 0x00, 16, 0x00, 12);
4253 MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false);
4262 MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false);
4270 MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false);
4279 MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false);
4287 MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false);
4296 MLXSW_REG_QPDSM_PRIO_ENTRY_REC_LEN, 0x00, false);
4331 MLXSW_ITEM32_LP(reg, qpdp, 0x00, 16, 0x00, 12);
4366 MLXSW_ITEM32_LP(reg, qpdpm, 0x00, 16, 0x00, 12);
4375 MLXSW_REG_QPDPM_DSCP_ENTRY_REC_LEN, 0x00, false);
4383 MLXSW_REG_QPDPM_DSCP_ENTRY_REC_LEN, 0x00, false);
4417 MLXSW_ITEM32_LP(reg, qtctm, 0x00, 16, 0x00, 12);
4455 MLXSW_ITEM32(reg, qpsc, port_speed, 0x00, 0, 4);
4554 MLXSW_ITEM32(reg, pmlp, rxtx, 0x00, 31, 1);
4560 MLXSW_ITEM32_LP(reg, pmlp, 0x00, 16, 0x00, 12);
4570 MLXSW_ITEM32(reg, pmlp, width, 0x00, 0, 8);
4576 MLXSW_ITEM32_INDEXED(reg, pmlp, module, 0x04, 0, 8, 0x04, 0x00, false);
4585 MLXSW_ITEM32_INDEXED(reg, pmlp, slot_index, 0x04, 8, 4, 0x04, 0x00, false);
4591 MLXSW_ITEM32_INDEXED(reg, pmlp, tx_lane, 0x04, 16, 4, 0x04, 0x00, false);
4598 MLXSW_ITEM32_INDEXED(reg, pmlp, rx_lane, 0x04, 24, 4, 0x04, 0x00, false);
4619 MLXSW_ITEM32_LP(reg, pmtu, 0x00, 16, 0x00, 12);
4675 MLXSW_ITEM32(reg, ptys, an_disable_admin, 0x00, 30, 1);
4681 MLXSW_ITEM32_LP(reg, ptys, 0x00, 16, 0x00, 12);
4693 MLXSW_ITEM32(reg, ptys, proto_mask, 0x00, 0, 3);
4868 MLXSW_ITEM32(reg, ppad, single_base_mac, 0x00, 28, 1);
4874 MLXSW_ITEM32_LP(reg, ppad, 0x00, 16, 0x00, 24);
4907 MLXSW_ITEM32(reg, paos, swid, 0x00, 24, 8);
4913 MLXSW_ITEM32_LP(reg, paos, 0x00, 16, 0x00, 12);
4924 MLXSW_ITEM32(reg, paos, admin_status, 0x00, 8, 4);
4934 MLXSW_ITEM32(reg, paos, oper_status, 0x00, 0, 4);
4984 MLXSW_ITEM32_LP(reg, pfcc, 0x00, 16, 0x00, 12);
4992 MLXSW_ITEM32(reg, pfcc, pnat, 0x00, 14, 2);
5001 MLXSW_ITEM32(reg, pfcc, shl_cap, 0x00, 1, 1);
5010 MLXSW_ITEM32(reg, pfcc, shl_opr, 0x00, 0, 1);
5126 MLXSW_ITEM32(reg, ppcnt, swid, 0x00, 24, 8);
5132 MLXSW_ITEM32_LP(reg, ppcnt, 0x00, 16, 0x00, 12);
5140 MLXSW_ITEM32(reg, ppcnt, pnat, 0x00, 14, 2);
5171 MLXSW_ITEM32(reg, ppcnt, grp, 0x00, 0, 6);
5205 MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);
5455 MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);
5529 MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);
5588 MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);
5604 MLXSW_REG_PPCNT_COUNTERS_OFFSET + 0x00, 0, 64);
5650 MLXSW_ITEM32(reg, pptb, mm, 0x00, 28, 2);
5656 MLXSW_ITEM32_LP(reg, pptb, 0x00, 16, 0x00, 12);
5662 MLXSW_ITEM32(reg, pptb, um, 0x00, 8, 1);
5669 MLXSW_ITEM32(reg, pptb, pm, 0x00, 0, 8);
5733 MLXSW_ITEM32_LP(reg, pbmc, 0x00, 16, 0x00, 12);
5758 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_lossy, 0x0C, 25, 1, 0x08, 0x00, false);
5767 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_epsb, 0x0C, 24, 1, 0x08, 0x00, false);
5774 MLXSW_ITEM32_INDEXED(reg, pbmc, buf_size, 0x0C, 0, 16, 0x08, 0x00, false);
5843 MLXSW_ITEM32(reg, pspa, swid, 0x00, 24, 8);
5849 MLXSW_ITEM32_LP(reg, pspa, 0x00, 16, 0x00, 0);
5856 MLXSW_ITEM32(reg, pspa, sub_port, 0x00, 8, 8);
5881 MLXSW_ITEM32(reg, pmaos, rst, 0x00, 31, 1);
5887 MLXSW_ITEM32(reg, pmaos, slot_index, 0x00, 24, 4);
5893 MLXSW_ITEM32(reg, pmaos, module, 0x00, 16, 8);
5911 MLXSW_ITEM32(reg, pmaos, admin_status, 0x00, 8, 4);
5961 MLXSW_ITEM32_LP(reg, pplr, 0x00, 16, 0x00, 12);
5999 MLXSW_ITEM32(reg, pmtdb, slot_index, 0x00, 24, 4);
6005 MLXSW_ITEM32(reg, pmtdb, module, 0x00, 16, 8);
6011 MLXSW_ITEM32(reg, pmtdb, ports_width, 0x00, 12, 4);
6017 MLXSW_ITEM32(reg, pmtdb, num_ports, 0x00, 8, 4);
6027 MLXSW_ITEM32(reg, pmtdb, status, 0x00, 0, 4);
6035 MLXSW_ITEM16_INDEXED(reg, pmtdb, port_num, 0x04, 0, 10, 0x02, 0x00, false);
6061 MLXSW_ITEM32_LP(reg, pmecr, 0x00, 16, 0x00, 12);
6127 MLXSW_ITEM32(reg, pmpe, slot_index, 0x00, 24, 4);
6133 MLXSW_ITEM32(reg, pmpe, module, 0x00, 16, 8);
6146 MLXSW_ITEM32(reg, pmpe, module_status, 0x00, 0, 4);
6167 MLXSW_ITEM32_LP(reg, pddr, 0x00, 16, 0x00, 12);
6218 MLXSW_ITEM32(reg, pmmp, module, 0x00, 16, 8);
6224 MLXSW_ITEM32(reg, pmmp, slot_index, 0x00, 24, 4);
6230 MLXSW_ITEM32(reg, pmmp, sticky, 0x00, 0, 1);
6273 MLXSW_ITEM32_LP(reg, pllp, 0x00, 16, 0x00, 12);
6279 MLXSW_ITEM32(reg, pllp, label_port, 0x00, 0, 8);
6321 MLXSW_ITEM32(reg, pmtm, slot_index, 0x00, 24, 4);
6327 MLXSW_ITEM32(reg, pmtm, module, 0x00, 16, 8);
6372 MLXSW_ITEM32(reg, htgt, swid, 0x00, 24, 8);
6380 MLXSW_ITEM32(reg, htgt, type, 0x00, 8, 4);
6427 MLXSW_ITEM32(reg, htgt, trap_group, 0x00, 0, 8);
6547 MLXSW_ITEM32(reg, hpkt, ack, 0x00, 24, 1);
6575 MLXSW_ITEM32(reg, hpkt, action, 0x00, 20, 3);
6581 MLXSW_ITEM32(reg, hpkt, trap_group, 0x00, 12, 6);
6590 MLXSW_ITEM32(reg, hpkt, trap_id, 0x00, 0, 10);
6635 MLXSW_ITEM32(reg, rgcr, ipv4_en, 0x00, 31, 1);
6641 MLXSW_ITEM32(reg, rgcr, ipv6_en, 0x00, 30, 1);
6708 MLXSW_ITEM32(reg, ritr, enable, 0x00, 31, 1);
6715 MLXSW_ITEM32(reg, ritr, ipv4, 0x00, 29, 1);
6722 MLXSW_ITEM32(reg, ritr, ipv6, 0x00, 28, 1);
6728 MLXSW_ITEM32(reg, ritr, ipv4_mc, 0x00, 27, 1);
6734 MLXSW_ITEM32(reg, ritr, ipv6_mc, 0x00, 26, 1);
6751 MLXSW_ITEM32(reg, ritr, type, 0x00, 23, 3);
6767 MLXSW_ITEM32(reg, ritr, op, 0x00, 20, 2);
6773 MLXSW_ITEM32(reg, ritr, rif, 0x00, 0, 16);
7168 MLXSW_ITEM32(reg, rtar, op, 0x00, 28, 4);
7179 MLXSW_ITEM32(reg, rtar, key_type, 0x00, 0, 8);
7233 MLXSW_ITEM32(reg, ratr, op, 0x00, 28, 4);
7247 MLXSW_ITEM32(reg, ratr, v, 0x00, 24, 1);
7254 MLXSW_ITEM32(reg, ratr, a, 0x00, 16, 1);
7372 MLXSW_REG_FLOW_COUNTER_SET_TYPE_NO_COUNT = 0x00,
7443 #define MLXSW_REG_RDPM_BASE_LEN 0x00
7458 -MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN, 0x00, false);
7465 -MLXSW_REG_RDPM_DSCP_ENTRY_REC_LEN, 0x00, false);
7491 MLXSW_REG_RICNT_COUNTER_SET_TYPE_NO_COUNT = 0x00,
7509 MLXSW_REG_RICNT_OPCODE_NOP = 0x00,
7520 MLXSW_ITEM32(reg, ricnt, op, 0x00, 28, 4);
7616 MLXSW_ITEM32(reg, rrcr, op, 0x00, 28, 4);
7622 MLXSW_ITEM32(reg, rrcr, offset, 0x00, 0, 16);
7671 MLXSW_ITEM32(reg, ralta, op, 0x00, 28, 2);
7683 MLXSW_ITEM32(reg, ralta, protocol, 0x00, 24, 4);
7691 MLXSW_ITEM32(reg, ralta, tree_id, 0x00, 0, 8);
7723 MLXSW_ITEM32(reg, ralst, root_bin, 0x00, 16, 8);
7729 MLXSW_ITEM32(reg, ralst, tree_id, 0x00, 0, 8);
7741 MLXSW_ITEM16_INDEXED(reg, ralst, left_child_bin, 0x04, 8, 8, 0x02, 0x00, false);
7749 MLXSW_ITEM16_INDEXED(reg, ralst, right_child_bin, 0x04, 0, 8, 0x02, 0x00,
7789 MLXSW_ITEM32(reg, raltb, virtual_router, 0x00, 16, 16);
7795 MLXSW_ITEM32(reg, raltb, protocol, 0x00, 12, 4);
7803 MLXSW_ITEM32(reg, raltb, tree_id, 0x00, 0, 8);
7829 MLXSW_ITEM32(reg, ralue, protocol, 0x00, 24, 4);
7862 MLXSW_ITEM32(reg, ralue, op, 0x00, 20, 3);
7871 MLXSW_ITEM32(reg, ralue, a, 0x00, 16, 1);
8113 MLXSW_ITEM32(reg, rauht, type, 0x00, 24, 2);
8144 MLXSW_ITEM32(reg, rauht, op, 0x00, 20, 3);
8153 MLXSW_ITEM32(reg, rauht, a, 0x00, 16, 1);
8159 MLXSW_ITEM32(reg, rauht, rif, 0x00, 0, 16);
8263 MLXSW_ITEM32(reg, raleu, protocol, 0x00, 24, 4);
8270 MLXSW_ITEM32(reg, raleu, virtual_router, 0x00, 0, 16);
8341 MLXSW_ITEM32(reg, rauhtd, filter_fields, 0x00, 0, 8);
8411 MLXSW_REG_RAUHTD_REC_LEN, 0x00, false);
8420 MLXSW_REG_RAUHTD_REC_LEN, 0x00, false);
8430 MLXSW_REG_RAUHTD_IPV4_ENT_LEN, 0x00, false);
8437 16, MLXSW_REG_RAUHTD_IPV4_ENT_LEN, 0x00, false);
8454 MLXSW_REG_RAUHTD_IPV6_ENT_LEN, 0x00, false);
8461 16, MLXSW_REG_RAUHTD_IPV6_ENT_LEN, 0x00, false);
8505 MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4);
8512 MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24);
8656 MLXSW_ITEM32(reg, rips, index, 0x00, 0, 24);
8692 MLXSW_ITEM32(reg, ratrad, op, 0x00, 30, 2);
8701 MLXSW_ITEM32(reg, ratrad, ecmp_size, 0x00, 0, 13);
8820 MLXSW_ITEM32(reg, recr2, pp, 0x00, 24, 1);
8826 MLXSW_ITEM32(reg, recr2, sh, 0x00, 8, 1);
8956 MLXSW_ITEM32(reg, rmft2, v, 0x00, 31, 1);
8966 MLXSW_ITEM32(reg, rmft2, type, 0x00, 28, 2);
8983 MLXSW_ITEM32(reg, rmft2, op, 0x00, 20, 2);
8990 MLXSW_ITEM32(reg, rmft2, a, 0x00, 16, 1);
8996 MLXSW_ITEM32(reg, rmft2, offset, 0x00, 0, 16);
9139 MLXSW_ITEM32(reg, reiv, port_page, 0x00, 0, 4);
9155 MLXSW_REG_REIV_REC_LEN, 0x00, false);
9163 MLXSW_REG_REIV_REC_LEN, 0x00, false);
9182 MLXSW_REG_MFCR_PWM_FEQ_11HZ = 0x00,
9196 MLXSW_ITEM32(reg, mfcr, pwm_frequency, 0x00, 0, 7);
9245 MLXSW_ITEM32(reg, mfsc, pwm, 0x00, 24, 3);
9276 MLXSW_ITEM32(reg, mfsm, tacho, 0x00, 24, 4);
9305 MLXSW_ITEM32(reg, mfsl, tacho, 0x00, 24, 4);
9354 MLXSW_ITEM32(reg, fore, fan_under_limit, 0x00, 16, 10);
9382 MLXSW_ITEM32(reg, mtcap, sensor_count, 0x00, 0, 7);
9399 MLXSW_ITEM32(reg, mtmp, slot_index, 0x00, 16, 4);
9409 MLXSW_ITEM32(reg, mtmp, sensor_index, 0x00, 0, 12);
9565 MLXSW_ITEM32(reg, mtbr, slot_index, 0x00, 16, 4);
9572 MLXSW_ITEM32(reg, mtbr, base_sensor_index, 0x00, 0, 12);
9589 16, MLXSW_REG_MTBR_REC_LEN, 0x00, false);
9597 MLXSW_REG_MTBR_REC_LEN, 0x00, false);
9642 MLXSW_ITEM32(reg, mcia, module, 0x00, 16, 8);
9648 MLXSW_ITEM32(reg, mcia, slot, 0x00, 12, 4);
9668 MLXSW_ITEM32(reg, mcia, status, 0x00, 0, 8);
9713 MLXSW_REG_MCIA_EEPROM_MODULE_INFO_REV_ID_UNSPC = 0x00,
9775 MLXSW_ITEM32(reg, mpat, pa_id, 0x00, 28, 4);
9782 MLXSW_ITEM32(reg, mpat, session_id, 0x00, 24, 4);
9788 MLXSW_ITEM32(reg, mpat, system_port, 0x00, 0, 16);
9999 MLXSW_ITEM32_LP(reg, mpar, 0x00, 16, 0x00, 4);
10010 MLXSW_ITEM32(reg, mpar, i_e, 0x00, 0, 4);
10131 MLXSW_ITEM32(reg, mrsr, command, 0x00, 0, 4);
10152 MLXSW_ITEM32_LP(reg, mlcr, 0x00, 16, 0x00, 24);
10194 MLXSW_ITEM32(reg, mcion, module, 0x00, 16, 8);
10200 MLXSW_ITEM32(reg, mcion, slot_index, 0x00, 12, 4);
10297 MLXSW_ITEM32(reg, mtutc, operation, 0x00, 0, 4);
10363 MLXSW_ITEM32(reg, mcqi, component_index, 0x00, 0, 16);
10454 MLXSW_ITEM32(reg, mcc, instruction, 0x00, 0, 8);
10529 MLXSW_ITEM32(reg, mcda, update_handle, 0x00, 0, 24);
10582 MLXSW_ITEM32(reg, mcam, feature_group, 0x00, 16, 8);
10651 MLXSW_ITEM32_LP(reg, mpsc, 0x00, 16, 0x00, 12);
10689 MLXSW_ITEM32(reg, mgpc, counter_set_type, 0x00, 24, 8);
10695 MLXSW_ITEM32(reg, mgpc, counter_index, 0x00, 0, 24);
10699 MLXSW_REG_MGPC_OPCODE_NOP = 0x00,
10748 MLXSW_ITEM32(reg, mprs, parsing_depth, 0x00, 0, 16);
10790 MLXSW_ITEM32(reg, mogcr, ptp_iftc, 0x00, 1, 1);
10799 MLXSW_ITEM32(reg, mogcr, ptp_eftc, 0x00, 0, 1);
10834 MLXSW_ITEM32(reg, mpagr, trigger, 0x00, 0, 4);
10876 MLXSW_ITEM32_LP(reg, momte, 0x00, 16, 0x00, 12);
10971 MLXSW_ITEM32_LP(reg, mtpptr, 0x00, 16, 0x00, 12);
10982 MLXSW_ITEM32(reg, mtpptr, dir, 0x00, 0, 1);
11076 MLXSW_ITEM32(reg, mtptpt, trap_id, 0x00, 0, 4);
11109 MLXSW_ITEM32(reg, mtpcpc, pport, 0x00, 31, 1);
11117 MLXSW_ITEM32_LP(reg, mtpcpc, 0x00, 16, 0x00, 12);
11169 MLXSW_ITEM32(reg, mfgd, fatal_event_mode, 0x00, 9, 2);
11174 MLXSW_ITEM32(reg, mfgd, trigger_test, 0x00, 11, 1);
11195 MLXSW_ITEM32(reg, mgpir, slot_index, 0x00, 28, 4);
11200 MLXSW_ITEM32(reg, mgpir, device_type, 0x00, 24, 4);
11206 MLXSW_ITEM32(reg, mgpir, devices_per_flash, 0x00, 16, 8);
11212 MLXSW_ITEM32(reg, mgpir, num_of_devices, 0x00, 0, 8);
11271 MLXSW_ITEM32(reg, mbct, slot_index, 0x00, 0, 4);
11392 MLXSW_ITEM32(reg, mddt, slot_index, 0x00, 8, 4);
11398 MLXSW_ITEM32(reg, mddt, device_index, 0x00, 0, 8);
11484 MLXSW_ITEM32(reg, mddq, sie, 0x00, 31, 1);
11498 MLXSW_ITEM32(reg, mddq, query_type, 0x00, 16, 8);
11504 MLXSW_ITEM32(reg, mddq, slot_index, 0x00, 0, 4);
11704 MLXSW_ITEM32(reg, mddc, slot_index, 0x00, 0, 4);
11739 MLXSW_ITEM32(reg, mfde, irisc_id, 0x00, 24, 8);
11754 MLXSW_ITEM32(reg, mfde, severity, 0x00, 16, 8);
11772 MLXSW_ITEM32(reg, mfde, event_id, 0x00, 0, 16);
11934 MLXSW_ITEM32(reg, tngcr, type, 0x00, 0, 4);
12116 MLXSW_ITEM32(reg, tnumt, record_type, 0x00, 28, 4);
12122 MLXSW_ITEM32(reg, tnumt, tunnel_port, 0x00, 24, 4);
12129 MLXSW_ITEM32(reg, tnumt, underlay_mc_ptr, 0x00, 0, 24);
12154 MLXSW_ITEM32_INDEXED(reg, tnumt, udip, 0x0C, 0, 32, 0x04, 0x00, false);
12161 MLXSW_ITEM32_INDEXED(reg, tnumt, udip_ptr, 0x0C, 0, 24, 0x04, 0x00, false);
12218 MLXSW_ITEM32_LP(reg, tnqdr, 0x00, 16, 0x00, 12);
12333 MLXSW_ITEM32(reg, tnpc, tunnel_port, 0x00, 0, 4);
12486 MLXSW_ITEM32(reg, sbpr, desc, 0x00, 31, 1);
12498 MLXSW_ITEM32(reg, sbpr, dir, 0x00, 24, 2);
12504 MLXSW_ITEM32(reg, sbpr, pool, 0x00, 0, 4);
12560 MLXSW_ITEM32_LP(reg, sbcm, 0x00, 16, 0x00, 4);
12570 MLXSW_ITEM32(reg, sbcm, pg_buff, 0x00, 8, 6);
12576 MLXSW_ITEM32(reg, sbcm, dir, 0x00, 0, 2);
12646 MLXSW_ITEM32_LP(reg, sbpm, 0x00, 16, 0x00, 12);
12652 MLXSW_ITEM32(reg, sbpm, pool, 0x00, 8, 4);
12658 MLXSW_ITEM32(reg, sbpm, dir, 0x00, 0, 2);
12735 MLXSW_ITEM32(reg, sbmm, prio, 0x00, 8, 4);
12796 MLXSW_ITEM32(reg, sbsr, clr, 0x00, 31, 1);
12857 0, 24, MLXSW_REG_SBSR_REC_LEN, 0x00, false);
12895 MLXSW_ITEM32_LP(reg, sbib, 0x00, 16, 0x00, 12);
13092 MLXSW_ITEM32(reg, pude, swid, 0x00, 24, 8);
13098 MLXSW_ITEM32_LP(reg, pude, 0x00, 16, 0x00, 12);
13109 MLXSW_ITEM32(reg, pude, admin_status, 0x00, 8, 4);
13119 MLXSW_ITEM32(reg, pude, oper_status, 0x00, 0, 4);