Lines Matching refs:Q_ADDR
1077 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_RESET);
1078 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_OPER_INIT);
1079 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_FIFO_OP_ON);
1080 sky2_write32(hw, Q_ADDR(q, Q_WM), BMU_WM_DEFAULT);
1274 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1305 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1308 sky2_write32(hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
1338 sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST);
1528 sky2_write32(hw, Q_ADDR(rxq, Q_WM), BMU_WM_PEX);
1535 sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS);
1586 sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST),
1694 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF);
1699 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV);
2050 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR),
2073 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_STOP);
2074 sky2_read32(hw, Q_ADDR(txqaddr[port], Q_CSR));
2370 sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE)));
2680 sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR),
2832 sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR);
2838 sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP);
2924 sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK);
2935 u8 fifo_rp = sky2_read8(hw, Q_ADDR(rxq, Q_RP));
2936 u8 fifo_lev = sky2_read8(hw, Q_ADDR(rxq, Q_RL));
2948 fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP)));
4336 Q_ADDR(rxqaddr[sky2->port], Q_CSR),
4424 sky2_read16(hw, Q_ADDR(txqaddr[port], Q_DONE)));