Lines Matching refs:db
119 static int dm9051_set_reg(struct board_info *db, unsigned int reg, unsigned int val)
123 ret = regmap_write(db->regmap_dm, reg, val);
125 netif_err(db, drv, db->ndev, "%s: error %d set reg %02x\n",
130 static int dm9051_update_bits(struct board_info *db, unsigned int reg, unsigned int mask,
135 ret = regmap_update_bits(db->regmap_dm, reg, mask, val);
137 netif_err(db, drv, db->ndev, "%s: error %d update bits reg %02x\n",
144 static int dm9051_dumpblk(struct board_info *db, u8 reg, size_t count)
146 struct net_device *ndev = db->ndev;
155 ret = regmap_read(db->regmap_dm, reg, &rb);
157 netif_err(db, drv, ndev, "%s: error %d dumping read reg %02x\n",
166 static int dm9051_set_regs(struct board_info *db, unsigned int reg, const void *val,
171 ret = regmap_bulk_write(db->regmap_dmbulk, reg, val, val_count);
173 netif_err(db, drv, db->ndev, "%s: error %d bulk writing regs %02x\n",
178 static int dm9051_get_regs(struct board_info *db, unsigned int reg, void *val,
183 ret = regmap_bulk_read(db->regmap_dmbulk, reg, val, val_count);
185 netif_err(db, drv, db->ndev, "%s: error %d bulk reading regs %02x\n",
190 static int dm9051_write_mem(struct board_info *db, unsigned int reg, const void *buff,
195 ret = regmap_noinc_write(db->regmap_dm, reg, buff, len);
197 netif_err(db, drv, db->ndev, "%s: error %d noinc writing regs %02x\n",
202 static int dm9051_read_mem(struct board_info *db, unsigned int reg, void *buff,
207 ret = regmap_noinc_read(db->regmap_dm, reg, buff, len);
209 netif_err(db, drv, db->ndev, "%s: error %d noinc reading regs %02x\n",
217 static int dm9051_nsr_poll(struct board_info *db)
222 ret = regmap_read_poll_timeout(db->regmap_dm, DM9051_NSR, mval,
225 netdev_err(db->ndev, "timeout in checking for tx end\n");
229 static int dm9051_epcr_poll(struct board_info *db)
234 ret = regmap_read_poll_timeout(db->regmap_dm, DM9051_EPCR, mval,
237 netdev_err(db->ndev, "eeprom/phy in processing get timeout\n");
241 static int dm9051_irq_flag(struct board_info *db)
243 struct spi_device *spi = db->spidev;
252 static unsigned int dm9051_intcr_value(struct board_info *db)
254 return (dm9051_irq_flag(db) == IRQF_TRIGGER_LOW) ?
258 static int dm9051_set_fcr(struct board_info *db)
262 if (db->pause.rx_pause)
264 if (db->pause.tx_pause)
267 return dm9051_set_reg(db, DM9051_FCR, fcr);
270 static int dm9051_set_recv(struct board_info *db)
274 ret = dm9051_set_regs(db, DM9051_MAR, db->rctl.hash_table, sizeof(db->rctl.hash_table));
278 return dm9051_set_reg(db, DM9051_RCR, db->rctl.rcr_all); /* enable rx */
281 static int dm9051_core_reset(struct board_info *db)
285 db->bc.fifo_rst_counter++;
287 ret = regmap_write(db->regmap_dm, DM9051_NCR, NCR_RST); /* NCR reset */
290 ret = regmap_write(db->regmap_dm, DM9051_MBNDRY, MBNDRY_BYTE); /* MemBound */
293 ret = regmap_write(db->regmap_dm, DM9051_PPCR, PPCR_PAUSE_COUNT); /* Pause Count */
296 ret = regmap_write(db->regmap_dm, DM9051_LMCR, db->lcr_all); /* LEDMode1 */
300 return dm9051_set_reg(db, DM9051_INTCR, dm9051_intcr_value(db));
303 static int dm9051_update_fcr(struct board_info *db)
307 if (db->pause.rx_pause)
309 if (db->pause.tx_pause)
312 return dm9051_update_bits(db, DM9051_FCR, FCR_RXTX_BITS, fcr);
315 static int dm9051_disable_interrupt(struct board_info *db)
317 return dm9051_set_reg(db, DM9051_IMR, IMR_PAR); /* disable int */
320 static int dm9051_enable_interrupt(struct board_info *db)
322 return dm9051_set_reg(db, DM9051_IMR, db->imr_all); /* enable int */
325 static int dm9051_stop_mrcmd(struct board_info *db)
327 return dm9051_set_reg(db, DM9051_ISR, ISR_STOP_MRCMD); /* to stop mrcmd */
330 static int dm9051_clear_interrupt(struct board_info *db)
332 return dm9051_update_bits(db, DM9051_ISR, ISR_CLR_INT, ISR_CLR_INT);
335 static int dm9051_eeprom_read(struct board_info *db, int offset, u8 *to)
339 ret = regmap_write(db->regmap_dm, DM9051_EPAR, offset);
343 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_ERPRR);
347 ret = dm9051_epcr_poll(db);
351 ret = regmap_write(db->regmap_dm, DM9051_EPCR, 0);
355 return regmap_bulk_read(db->regmap_dmbulk, DM9051_EPDRL, to, 2);
358 static int dm9051_eeprom_write(struct board_info *db, int offset, u8 *data)
362 ret = regmap_write(db->regmap_dm, DM9051_EPAR, offset);
366 ret = regmap_bulk_write(db->regmap_dmbulk, DM9051_EPDRL, data, 2);
370 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_WEP | EPCR_ERPRW);
374 ret = dm9051_epcr_poll(db);
378 return regmap_write(db->regmap_dm, DM9051_EPCR, 0);
383 struct board_info *db = context;
386 ret = regmap_write(db->regmap_dm, DM9051_EPAR, DM9051_PHY | reg);
390 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_ERPRR | EPCR_EPOS);
394 ret = dm9051_epcr_poll(db);
398 ret = regmap_write(db->regmap_dm, DM9051_EPCR, 0);
406 return regmap_bulk_read(db->regmap_dmbulk, DM9051_EPDRL, val, 2);
411 struct board_info *db = context;
414 ret = regmap_write(db->regmap_dm, DM9051_EPAR, DM9051_PHY | reg);
418 ret = regmap_bulk_write(db->regmap_dmbulk, DM9051_EPDRL, &val, 2);
422 ret = regmap_write(db->regmap_dm, DM9051_EPCR, EPCR_EPOS | EPCR_ERPRW);
426 ret = dm9051_epcr_poll(db);
430 return regmap_write(db->regmap_dm, DM9051_EPCR, 0);
435 struct board_info *db = bus->priv;
440 ret = dm9051_phyread(db, regnum, &val);
450 struct board_info *db = bus->priv;
453 return dm9051_phywrite(db, regnum, val);
460 struct board_info *db = dbcontext;
462 mutex_lock(&db->reg_mutex);
467 struct board_info *db = dbcontext;
469 mutex_unlock(&db->reg_mutex);
500 static int dm9051_map_init(struct spi_device *spi, struct board_info *db)
506 regconfigdm.lock_arg = db;
507 db->regmap_dm = devm_regmap_init_spi(db->spidev, ®configdm);
508 if (IS_ERR(db->regmap_dm))
509 return PTR_ERR(db->regmap_dm);
511 regconfigdmbulk.lock_arg = db;
512 db->regmap_dmbulk = devm_regmap_init_spi(db->spidev, ®configdmbulk);
513 return PTR_ERR_OR_ZERO(db->regmap_dmbulk);
516 static int dm9051_map_chipid(struct board_info *db)
518 struct device *dev = &db->spidev->dev;
523 ret = dm9051_get_regs(db, DM9051_VIDL, buff, sizeof(buff));
539 static int dm9051_map_etherdev_par(struct net_device *ndev, struct board_info *db)
544 ret = dm9051_get_regs(db, DM9051_PAR, addr, sizeof(addr));
551 ret = dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
555 dev_dbg(&db->spidev->dev, "Use random MAC address\n");
572 struct board_info *db = to_dm9051_board(ndev);
574 db->msg_enable = value;
579 struct board_info *db = to_dm9051_board(ndev);
581 return db->msg_enable;
592 struct board_info *db = to_dm9051_board(ndev);
603 ret = dm9051_eeprom_read(db, (offset + i) / 2, data + i);
613 struct board_info *db = to_dm9051_board(ndev);
625 ret = dm9051_eeprom_write(db, (offset + i) / 2, data + i);
635 struct board_info *db = to_dm9051_board(ndev);
637 *pause = db->pause;
643 struct board_info *db = to_dm9051_board(ndev);
645 db->pause = *pause;
648 return dm9051_update_fcr(db);
650 phy_set_sym_pause(db->phydev, pause->rx_pause, pause->tx_pause,
652 phy_start_aneg(db->phydev);
671 static int dm9051_all_start(struct board_info *db)
677 ret = dm9051_set_reg(db, DM9051_GPR, 0);
686 ret = dm9051_core_reset(db);
690 return dm9051_enable_interrupt(db);
693 static int dm9051_all_stop(struct board_info *db)
700 ret = dm9051_set_reg(db, DM9051_GPR, GPR_PHY_OFF);
704 return dm9051_set_reg(db, DM9051_RCR, RCR_RX_DISABLE);
709 static int dm9051_all_restart(struct board_info *db)
711 struct net_device *ndev = db->ndev;
714 ret = dm9051_core_reset(db);
718 ret = dm9051_enable_interrupt(db);
723 db->bc.status_err_counter + db->bc.large_err_counter,
724 db->bc.fifo_rst_counter);
726 ret = dm9051_set_recv(db);
730 return dm9051_set_fcr(db);
739 static int dm9051_loop_rx(struct board_info *db)
741 struct net_device *ndev = db->ndev;
749 ret = dm9051_read_mem(db, DM_SPI_MRCMDX, &rxbyte, 2);
756 ret = dm9051_read_mem(db, DM_SPI_MRCMD, &db->rxhdr, DM_RXHDR_SIZE);
760 ret = dm9051_stop_mrcmd(db);
764 rxlen = le16_to_cpu(db->rxhdr.rxlen);
765 if (db->rxhdr.status & RSR_ERR_BITS || rxlen > DM9051_PKT_MAX) {
767 db->rxhdr.headbyte);
769 if (db->rxhdr.status & RSR_ERR_BITS) {
770 db->bc.status_err_counter++;
772 db->rxhdr.status);
774 db->bc.large_err_counter++;
778 return dm9051_all_restart(db);
783 ret = dm9051_dumpblk(db, DM_SPI_MRCMD, rxlen);
790 ret = dm9051_read_mem(db, DM_SPI_MRCMD, rdptr, rxlen);
792 db->bc.rx_err_counter++;
797 ret = dm9051_stop_mrcmd(db);
803 skb->protocol = eth_type_trans(skb, db->ndev);
804 if (db->ndev->features & NETIF_F_RXCSUM)
807 db->ndev->stats.rx_bytes += rxlen;
808 db->ndev->stats.rx_packets++;
820 static int dm9051_single_tx(struct board_info *db, u8 *buff, unsigned int len)
824 ret = dm9051_nsr_poll(db);
828 ret = dm9051_write_mem(db, DM_SPI_MWCMD, buff, len);
832 ret = dm9051_set_regs(db, DM9051_TXPLL, &len, 2);
836 return dm9051_set_reg(db, DM9051_TCR, TCR_TXREQ);
839 static int dm9051_loop_tx(struct board_info *db)
841 struct net_device *ndev = db->ndev;
845 while (!skb_queue_empty(&db->txq)) {
849 skb = skb_dequeue(&db->txq);
852 ret = dm9051_single_tx(db, skb->data, skb->len);
856 db->bc.tx_err_counter++;
864 (skb_queue_len(&db->txq) < DM9051_TX_QUE_LO_WATER))
873 struct board_info *db = pw;
876 mutex_lock(&db->spi_lockm);
878 result = dm9051_disable_interrupt(db);
882 result = dm9051_clear_interrupt(db);
887 result = dm9051_loop_rx(db); /* threaded irq rx */
890 result_tx = dm9051_loop_tx(db); /* more tx better performance */
895 dm9051_enable_interrupt(db);
900 mutex_unlock(&db->spi_lockm);
907 struct board_info *db = container_of(work, struct board_info, tx_work);
910 mutex_lock(&db->spi_lockm);
912 result = dm9051_loop_tx(db);
914 netdev_err(db->ndev, "transmit packet error\n");
916 mutex_unlock(&db->spi_lockm);
921 struct board_info *db = container_of(work, struct board_info, rxctrl_work);
922 struct net_device *ndev = db->ndev;
925 mutex_lock(&db->spi_lockm);
927 result = dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
931 dm9051_set_recv(db);
936 mutex_unlock(&db->spi_lockm);
945 struct board_info *db = to_dm9051_board(ndev);
946 struct spi_device *spi = db->spidev;
949 db->imr_all = IMR_PAR | IMR_PRM;
950 db->lcr_all = LMCR_MODE1;
951 db->rctl.rcr_all = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
952 memset(db->rctl.hash_table, 0, sizeof(db->rctl.hash_table));
956 dm9051_irq_flag(db) | IRQF_ONESHOT,
957 ndev->name, db);
963 phy_support_sym_pause(db->phydev);
964 phy_start(db->phydev);
967 db->pause.rx_pause = true;
968 db->pause.tx_pause = true;
969 db->pause.autoneg = AUTONEG_DISABLE;
971 if (db->phydev->autoneg)
972 db->pause.autoneg = AUTONEG_ENABLE;
974 ret = dm9051_all_start(db);
976 phy_stop(db->phydev);
977 free_irq(spi->irq, db);
993 struct board_info *db = to_dm9051_board(ndev);
996 ret = dm9051_all_stop(db);
1000 flush_work(&db->tx_work);
1001 flush_work(&db->rxctrl_work);
1003 phy_stop(db->phydev);
1005 free_irq(db->spidev->irq, db);
1009 skb_queue_purge(&db->txq);
1018 struct board_info *db = to_dm9051_board(ndev);
1020 skb_queue_tail(&db->txq, skb);
1021 if (skb_queue_len(&db->txq) > DM9051_TX_QUE_HI_WATER)
1024 schedule_work(&db->tx_work);
1033 struct board_info *db = to_dm9051_board(ndev);
1068 if (memcmp(&db->rctl, &rxctrl, sizeof(rxctrl))) {
1069 memcpy(&db->rctl, &rxctrl, sizeof(rxctrl));
1070 schedule_work(&db->rxctrl_work);
1078 struct board_info *db = to_dm9051_board(ndev);
1086 return dm9051_set_regs(db, DM9051_PAR, ndev->dev_addr, sizeof(ndev->dev_addr));
1098 static void dm9051_operation_clear(struct board_info *db)
1100 db->bc.status_err_counter = 0;
1101 db->bc.large_err_counter = 0;
1102 db->bc.rx_err_counter = 0;
1103 db->bc.tx_err_counter = 0;
1104 db->bc.fifo_rst_counter = 0;
1107 static int dm9051_mdio_register(struct board_info *db)
1109 struct spi_device *spi = db->spidev;
1112 db->mdiobus = devm_mdiobus_alloc(&spi->dev);
1113 if (!db->mdiobus)
1116 db->mdiobus->priv = db;
1117 db->mdiobus->read = dm9051_mdio_read;
1118 db->mdiobus->write = dm9051_mdio_write;
1119 db->mdiobus->name = "dm9051-mdiobus";
1120 db->mdiobus->phy_mask = (u32)~BIT(1);
1121 db->mdiobus->parent = &spi->dev;
1122 snprintf(db->mdiobus->id, MII_BUS_ID_SIZE,
1125 ret = devm_mdiobus_register(&spi->dev, db->mdiobus);
1134 struct board_info *db = to_dm9051_board(ndev);
1136 phy_print_status(db->phydev);
1141 if (db->phydev->link) {
1142 if (db->phydev->pause) {
1143 db->pause.rx_pause = true;
1144 db->pause.tx_pause = true;
1146 dm9051_update_fcr(db);
1152 static int dm9051_phy_connect(struct board_info *db)
1157 db->mdiobus->id, DM9051_PHY_ADDR);
1159 db->phydev = phy_connect(db->ndev, phy_id, dm9051_handle_link_change,
1161 return PTR_ERR_OR_ZERO(db->phydev);
1168 struct board_info *db;
1178 db = netdev_priv(ndev);
1180 db->msg_enable = 0;
1181 db->spidev = spi;
1182 db->ndev = ndev;
1187 mutex_init(&db->spi_lockm);
1188 mutex_init(&db->reg_mutex);
1190 INIT_WORK(&db->rxctrl_work, dm9051_rxctl_delay);
1191 INIT_WORK(&db->tx_work, dm9051_tx_delay);
1193 ret = dm9051_map_init(spi, db);
1197 ret = dm9051_map_chipid(db);
1201 ret = dm9051_map_etherdev_par(ndev, db);
1205 ret = dm9051_mdio_register(db);
1209 ret = dm9051_phy_connect(db);
1213 dm9051_operation_clear(db);
1214 skb_queue_head_init(&db->txq);
1218 phy_disconnect(db->phydev);
1229 struct board_info *db = to_dm9051_board(ndev);
1231 phy_disconnect(db->phydev);