Lines Matching refs:db
141 #define dm9000_dbg(db, lev, msg...) do { \
143 dev_dbg(db->dev, msg); \
158 ior(struct board_info *db, int reg)
160 writeb(reg, db->io_addr);
161 return readb(db->io_data);
169 iow(struct board_info *db, int reg, int value)
171 writeb(reg, db->io_addr);
172 writeb(value, db->io_data);
176 dm9000_reset(struct board_info *db)
178 dev_dbg(db->dev, "resetting device\n");
184 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
186 if (ior(db, DM9000_NCR) & 1)
187 dev_err(db->dev, "dm9000 did not respond to first reset\n");
189 iow(db, DM9000_NCR, 0);
190 iow(db, DM9000_NCR, NCR_RST | NCR_MAC_LBK);
192 if (ior(db, DM9000_NCR) & 1)
193 dev_err(db->dev, "dm9000 did not respond to second reset\n");
265 static void dm9000_msleep(struct board_info *db, unsigned int ms)
267 if (db->in_suspend || db->in_timeout)
277 struct board_info *db = netdev_priv(dev);
282 mutex_lock(&db->addr_lock);
284 spin_lock_irqsave(&db->lock, flags);
287 reg_save = readb(db->io_addr);
290 iow(db, DM9000_EPAR, DM9000_PHY | reg);
293 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS);
295 writeb(reg_save, db->io_addr);
296 spin_unlock_irqrestore(&db->lock, flags);
298 dm9000_msleep(db, 1); /* Wait read complete */
300 spin_lock_irqsave(&db->lock, flags);
301 reg_save = readb(db->io_addr);
303 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
306 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
309 writeb(reg_save, db->io_addr);
310 spin_unlock_irqrestore(&db->lock, flags);
312 mutex_unlock(&db->addr_lock);
314 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
323 struct board_info *db = netdev_priv(dev);
327 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
328 if (!db->in_timeout)
329 mutex_lock(&db->addr_lock);
331 spin_lock_irqsave(&db->lock, flags);
334 reg_save = readb(db->io_addr);
337 iow(db, DM9000_EPAR, DM9000_PHY | reg);
340 iow(db, DM9000_EPDRL, value);
341 iow(db, DM9000_EPDRH, value >> 8);
344 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW);
346 writeb(reg_save, db->io_addr);
347 spin_unlock_irqrestore(&db->lock, flags);
349 dm9000_msleep(db, 1); /* Wait write complete */
351 spin_lock_irqsave(&db->lock, flags);
352 reg_save = readb(db->io_addr);
354 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
357 writeb(reg_save, db->io_addr);
359 spin_unlock_irqrestore(&db->lock, flags);
360 if (!db->in_timeout)
361 mutex_unlock(&db->addr_lock);
370 static void dm9000_set_io(struct board_info *db, int byte_width)
378 db->dumpblk = dm9000_dumpblk_8bit;
379 db->outblk = dm9000_outblk_8bit;
380 db->inblk = dm9000_inblk_8bit;
385 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
388 db->dumpblk = dm9000_dumpblk_16bit;
389 db->outblk = dm9000_outblk_16bit;
390 db->inblk = dm9000_inblk_16bit;
395 db->dumpblk = dm9000_dumpblk_32bit;
396 db->outblk = dm9000_outblk_32bit;
397 db->inblk = dm9000_inblk_32bit;
402 static void dm9000_schedule_poll(struct board_info *db)
404 if (db->type == TYPE_DM9000E)
405 schedule_delayed_work(&db->phy_poll, HZ * 2);
419 dm9000_read_locked(struct board_info *db, int reg)
424 spin_lock_irqsave(&db->lock, flags);
425 ret = ior(db, reg);
426 spin_unlock_irqrestore(&db->lock, flags);
431 static int dm9000_wait_eeprom(struct board_info *db)
448 status = dm9000_read_locked(db, DM9000_EPCR);
456 dev_dbg(db->dev, "timeout waiting EEPROM\n");
468 dm9000_read_eeprom(struct board_info *db, int offset, u8 *to)
472 if (db->flags & DM9000_PLATF_NO_EEPROM) {
478 mutex_lock(&db->addr_lock);
480 spin_lock_irqsave(&db->lock, flags);
482 iow(db, DM9000_EPAR, offset);
483 iow(db, DM9000_EPCR, EPCR_ERPRR);
485 spin_unlock_irqrestore(&db->lock, flags);
487 dm9000_wait_eeprom(db);
492 spin_lock_irqsave(&db->lock, flags);
494 iow(db, DM9000_EPCR, 0x0);
496 to[0] = ior(db, DM9000_EPDRL);
497 to[1] = ior(db, DM9000_EPDRH);
499 spin_unlock_irqrestore(&db->lock, flags);
501 mutex_unlock(&db->addr_lock);
508 dm9000_write_eeprom(struct board_info *db, int offset, u8 *data)
512 if (db->flags & DM9000_PLATF_NO_EEPROM)
515 mutex_lock(&db->addr_lock);
517 spin_lock_irqsave(&db->lock, flags);
518 iow(db, DM9000_EPAR, offset);
519 iow(db, DM9000_EPDRH, data[1]);
520 iow(db, DM9000_EPDRL, data[0]);
521 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
522 spin_unlock_irqrestore(&db->lock, flags);
524 dm9000_wait_eeprom(db);
528 spin_lock_irqsave(&db->lock, flags);
529 iow(db, DM9000_EPCR, 0);
530 spin_unlock_irqrestore(&db->lock, flags);
532 mutex_unlock(&db->addr_lock);
747 static void dm9000_show_carrier(struct board_info *db,
751 struct net_device *ndev = db->ndev;
752 struct mii_if_info *mii = &db->mii;
753 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
757 dev_info(db->dev,
762 dev_info(db->dev, "%s: link down\n", ndev->name);
770 struct board_info *db = container_of(dw, struct board_info, phy_poll);
771 struct net_device *ndev = db->ndev;
773 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
774 !(db->flags & DM9000_PLATF_EXT_PHY)) {
775 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
782 if (netif_msg_link(db))
783 dm9000_show_carrier(db, new_carrier, nsr);
791 mii_check_media(&db->mii, netif_msg_link(db), 0);
794 dm9000_schedule_poll(db);
803 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
807 iounmap(db->io_addr);
808 iounmap(db->io_data);
812 if (db->data_req)
813 release_resource(db->data_req);
814 kfree(db->data_req);
816 if (db->addr_req)
817 release_resource(db->addr_req);
818 kfree(db->addr_req);
838 struct board_info *db = netdev_priv(dev);
845 dm9000_dbg(db, 1, "entering %s\n", __func__);
848 iow(db, oft, dev->dev_addr[i]);
864 iow(db, oft++, hash_table[i]);
865 iow(db, oft++, hash_table[i] >> 8);
868 iow(db, DM9000_RCR, rcr);
874 struct board_info *db = netdev_priv(dev);
877 spin_lock_irqsave(&db->lock, flags);
879 spin_unlock_irqrestore(&db->lock, flags);
883 dm9000_mask_interrupts(struct board_info *db)
885 iow(db, DM9000_IMR, IMR_PAR);
889 dm9000_unmask_interrupts(struct board_info *db)
891 iow(db, DM9000_IMR, db->imr_all);
900 struct board_info *db = netdev_priv(dev);
904 dm9000_dbg(db, 1, "entering %s\n", __func__);
906 dm9000_reset(db);
907 dm9000_mask_interrupts(db);
910 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
914 iow(db, DM9000_RCSR,
917 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
918 iow(db, DM9000_GPR, 0);
923 if (db->type == TYPE_DM9000B) {
928 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
933 if (db->wake_supported)
936 iow(db, DM9000_NCR, ncr);
939 iow(db, DM9000_TCR, 0); /* TX Polling clear */
940 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
941 iow(db, DM9000_FCR, 0xff); /* Flow Control */
942 iow(db, DM9000_SMCR, 0); /* Special Mode */
944 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
945 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
951 if (db->type != TYPE_DM9000E)
954 db->imr_all = imr;
957 db->tx_pkt_cnt = 0;
958 db->queue_pkt_len = 0;
965 struct board_info *db = netdev_priv(dev);
970 spin_lock_irqsave(&db->lock, flags);
971 db->in_timeout = 1;
972 reg_save = readb(db->io_addr);
976 dm9000_unmask_interrupts(db);
982 writeb(reg_save, db->io_addr);
983 db->in_timeout = 0;
984 spin_unlock_irqrestore(&db->lock, flags);
1018 struct board_info *db = netdev_priv(dev);
1020 dm9000_dbg(db, 3, "%s:\n", __func__);
1022 if (db->tx_pkt_cnt > 1)
1025 spin_lock_irqsave(&db->lock, flags);
1028 writeb(DM9000_MWCMD, db->io_addr);
1030 (db->outblk)(db->io_data, skb->data, skb->len);
1033 db->tx_pkt_cnt++;
1035 if (db->tx_pkt_cnt == 1) {
1039 db->queue_pkt_len = skb->len;
1040 db->queue_ip_summed = skb->ip_summed;
1044 spin_unlock_irqrestore(&db->lock, flags);
1057 static void dm9000_tx_done(struct net_device *dev, struct board_info *db)
1059 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
1063 db->tx_pkt_cnt--;
1066 if (netif_msg_tx_done(db))
1067 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
1070 if (db->tx_pkt_cnt > 0)
1071 dm9000_send_packet(dev, db->queue_ip_summed,
1072 db->queue_pkt_len);
1089 struct board_info *db = netdev_priv(dev);
1098 ior(db, DM9000_MRCMDX); /* Dummy read */
1101 rxbyte = readb(db->io_data);
1105 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
1106 iow(db, DM9000_RCR, 0x00); /* Stop Device */
1115 writeb(DM9000_MRCMD, db->io_addr);
1117 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
1121 if (netif_msg_rx_status(db))
1122 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
1128 if (netif_msg_rx_err(db))
1129 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
1133 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1142 if (netif_msg_rx_err(db))
1143 dev_dbg(db->dev, "fifo error\n");
1147 if (netif_msg_rx_err(db))
1148 dev_dbg(db->dev, "crc error\n");
1152 if (netif_msg_rx_err(db))
1153 dev_dbg(db->dev, "length error\n");
1166 (db->inblk)(db->io_data, rdptr, RxLen);
1183 (db->dumpblk)(db->io_data, RxLen);
1191 struct board_info *db = netdev_priv(dev);
1196 dm9000_dbg(db, 3, "entering %s\n", __func__);
1200 /* holders of db->lock must always block IRQs */
1201 spin_lock_irqsave(&db->lock, flags);
1204 reg_save = readb(db->io_addr);
1206 dm9000_mask_interrupts(db);
1208 int_status = ior(db, DM9000_ISR); /* Got ISR */
1209 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1211 if (netif_msg_intr(db))
1212 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1220 dm9000_tx_done(dev, db);
1222 if (db->type != TYPE_DM9000E) {
1225 schedule_delayed_work(&db->phy_poll, 1);
1229 dm9000_unmask_interrupts(db);
1231 writeb(reg_save, db->io_addr);
1233 spin_unlock_irqrestore(&db->lock, flags);
1241 struct board_info *db = netdev_priv(dev);
1245 spin_lock_irqsave(&db->lock, flags);
1247 nsr = ior(db, DM9000_NSR);
1248 wcr = ior(db, DM9000_WCR);
1250 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1254 iow(db, DM9000_NSR, NSR_WAKEST);
1257 dev_info(db->dev, "wake by link status change\n");
1259 dev_info(db->dev, "wake by sample packet\n");
1261 dev_info(db->dev, "wake by magic packet\n");
1263 dev_err(db->dev, "wake signalled with no reason? "
1267 spin_unlock_irqrestore(&db->lock, flags);
1291 struct board_info *db = netdev_priv(dev);
1294 if (netif_msg_ifup(db))
1295 dev_dbg(db->dev, "enabling %s\n", dev->name);
1301 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1306 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
1317 dm9000_unmask_interrupts(db);
1320 db->dbug_cnt = 0;
1322 mii_check_media(&db->mii, netif_msg_link(db), 1);
1326 schedule_delayed_work(&db->phy_poll, 1);
1334 struct board_info *db = netdev_priv(dev);
1338 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1339 dm9000_mask_interrupts(db);
1340 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1350 struct board_info *db = netdev_priv(ndev);
1352 if (netif_msg_ifdown(db))
1353 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1355 cancel_delayed_work_sync(&db->phy_poll);
1415 struct board_info *db; /* Point a board information structure */
1485 db = netdev_priv(ndev);
1487 db->dev = &pdev->dev;
1488 db->ndev = ndev;
1490 db->power_supply = power;
1492 spin_lock_init(&db->lock);
1493 mutex_init(&db->addr_lock);
1495 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1497 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1498 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1500 if (!db->addr_res || !db->data_res) {
1501 dev_err(db->dev, "insufficient resources addr=%p data=%p\n",
1502 db->addr_res, db->data_res);
1513 db->irq_wake = platform_get_irq_optional(pdev, 1);
1514 if (db->irq_wake >= 0) {
1515 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1517 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1518 IRQF_SHARED, dev_name(db->dev), ndev);
1520 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1524 ret = irq_set_irq_wake(db->irq_wake, 1);
1526 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1527 db->irq_wake, ret);
1529 irq_set_irq_wake(db->irq_wake, 0);
1530 db->wake_supported = 1;
1535 iosize = resource_size(db->addr_res);
1536 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1539 if (db->addr_req == NULL) {
1540 dev_err(db->dev, "cannot claim address reg area\n");
1545 db->io_addr = ioremap(db->addr_res->start, iosize);
1547 if (db->io_addr == NULL) {
1548 dev_err(db->dev, "failed to ioremap address reg\n");
1553 iosize = resource_size(db->data_res);
1554 db->data_req = request_mem_region(db->data_res->start, iosize,
1557 if (db->data_req == NULL) {
1558 dev_err(db->dev, "cannot claim data reg area\n");
1563 db->io_data = ioremap(db->data_res->start, iosize);
1565 if (db->io_data == NULL) {
1566 dev_err(db->dev, "failed to ioremap data reg\n");
1572 ndev->base_addr = (unsigned long)db->io_addr;
1575 dm9000_set_io(db, iosize);
1583 dm9000_set_io(db, 1);
1586 dm9000_set_io(db, 2);
1589 dm9000_set_io(db, 4);
1595 db->inblk = pdata->inblk;
1598 db->outblk = pdata->outblk;
1601 db->dumpblk = pdata->dumpblk;
1603 db->flags = pdata->flags;
1607 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1610 dm9000_reset(db);
1614 id_val = ior(db, DM9000_VIDL);
1615 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1616 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1617 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1621 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1625 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1632 id_val = ior(db, DM9000_CHIPR);
1633 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1637 db->type = TYPE_DM9000A;
1640 db->type = TYPE_DM9000B;
1643 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1644 db->type = TYPE_DM9000E;
1648 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1659 db->msg_enable = NETIF_MSG_LINK;
1660 db->mii.phy_id_mask = 0x1f;
1661 db->mii.reg_num_mask = 0x1f;
1662 db->mii.force_media = 0;
1663 db->mii.full_duplex = 0;
1664 db->mii.dev = ndev;
1665 db->mii.mdio_read = dm9000_phy_read;
1666 db->mii.mdio_write = dm9000_phy_write;
1672 dm9000_read_eeprom(db, i / 2, addr + i);
1685 addr[i] = ior(db, i + DM9000_PAR);
1701 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please set using ip\n",
1704 ndev->name, dm9000_type_to_char(db->type),
1705 db->io_addr, db->io_data, ndev->irq,
1711 dev_err(db->dev, "not found (%d).\n", ret);
1713 dm9000_release_board(pdev, db);
1727 struct board_info *db;
1730 db = netdev_priv(ndev);
1731 db->in_suspend = 1;
1739 if (!db->wake_state)
1749 struct board_info *db = netdev_priv(ndev);
1755 if (!db->wake_state) {
1757 dm9000_unmask_interrupts(db);
1763 db->in_suspend = 0;