Lines Matching refs:workaround
184 * works around this bug by double copying the packet. This workaround
4842 /* 5701 {A0,B0} CRC bug workaround */
5504 int workaround, port_a;
5507 workaround = 0;
5513 workaround = 1;
5526 if (workaround) {
5565 if (workaround)
5603 if (workaround) {
7858 /* Use GSO to workaround all TSO packets that meet HW bug conditions
8116 /* If the workaround fails due to memory/mapping
9088 * hardware workaround, while we do the reset.
9160 /* restore 5701 hardware bug workaround write method */
10085 * south bridge limitation. As a workaround, Driver is setting MRRS
16178 * then on 5700_BX chips we have to enable a workaround.
16179 * The workaround is to set the TG3PCI_DMA_RW_CTRL boundary
16181 * workaround but turns MWI off all the times so never uses
16182 * it. This seems to suggest that the workaround is insufficient.
16216 * enable this workaround if the 5703 is on the secondary
16296 * DMA workaround.
16488 /* Important! -- It is critical that the PCI-X hw workaround
16493 * mailboxes written twice to workaround a bug.
16497 /* If we are in PCI-X mode, enable register write workaround.
16499 * The workaround is to use indirect register accesses
16547 /* Various workaround register access methods */
16555 * chips, the workaround is to read back all reg writes
16771 /* Set these bits to enable statistics workaround. */
16822 * value is bad, force enable the PCIX workaround.
16936 * 8 for these chips to workaround hw errata.
17293 * do the less restrictive ONE_DMA workaround for
17339 * on those chips to enable a PCI-X workaround.