Lines Matching refs:dma_rwctrl
10051 tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl);
10057 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17269 tp->dma_rwctrl = ((0x7 << DMA_RWCTRL_PCI_WRITE_CMD_SHIFT) |
17272 tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);
17279 tp->dma_rwctrl |= 0x00180000;
17283 tp->dma_rwctrl |= 0x003f0000;
17285 tp->dma_rwctrl |= 0x003f000f;
17298 tp->dma_rwctrl |= 0x8000;
17300 tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;
17305 tp->dma_rwctrl |=
17311 tp->dma_rwctrl |= 0x00144000;
17314 tp->dma_rwctrl |= 0x00148000;
17316 tp->dma_rwctrl |= 0x001b000f;
17320 tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA;
17324 tp->dma_rwctrl &= 0xfffffff0;
17329 tp->dma_rwctrl |= DMA_RWCTRL_USE_MEM_READ_MULT;
17341 tp->dma_rwctrl |= DMA_RWCTRL_ASSERT_ALL_BE;
17344 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17354 saved_dma_rwctrl = tp->dma_rwctrl;
17355 tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
17356 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17386 if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
17388 tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
17389 tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
17390 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17407 if ((tp->dma_rwctrl & DMA_RWCTRL_WRITE_BNDRY_MASK) !=
17414 tp->dma_rwctrl &= ~DMA_RWCTRL_WRITE_BNDRY_MASK;
17415 tp->dma_rwctrl |= DMA_RWCTRL_WRITE_BNDRY_16;
17418 tp->dma_rwctrl = saved_dma_rwctrl;
17421 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
17942 netdev_info(dev, "dma_rwctrl[%08x] dma_mask[%d-bit]\n",
17943 tp->dma_rwctrl,