Lines Matching refs:byte
7720 /* Avoid the 8byte DMA problem */
9207 * Older PCIe devices only support the 128 byte
12049 /* adjustments to start on required 4 byte boundary */
12065 /* read bytes up to the last 4 byte boundary */
12088 /* read last bytes not ending on 4 byte boundary */
12125 /* adjustments to start on required 4 byte boundary */
12137 /* adjustments to end on required 4 byte boundary */
12868 * the byte order as it exists in NVRAM.
16788 /* Initialize data/descriptor byte/word swapping. */
17030 u8 byte;
17033 pci_read_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE, &byte);
17034 if (byte == 0)
17037 cacheline_size = (int) byte * 4;
17333 * to streamable DMA memory with not all the byte
17646 /* The word/byte swap controls here control register access byte
17647 * swapping. DMA data byte swapping is controlled in the GRC_MODE
17656 /* The NONFRM (non-frame) byte/word swap controls take effect