Lines Matching defs:high
2500 u32 low, high;
2503 tg3_readphy(tp, MII_TG3_DSP_RW_PORT, &high) ||
2509 high &= 0x000f;
2511 high != test_pat[chan][i+1]) {
2747 /* Set phy register 0x10 bit 0 to high fifo elasticity to support
10172 * TG3_BDINFO_HOST_ADDR: high/low parts of DMA address of ring
10462 /* GPIO1 must be driven high for eeprom write protect */
10890 (PSTAT)->high += 1; \
10952 sp->rx_discards.high += 1;
11797 return ((u64)val->high << 32) | ((u64)val->low);
16665 * tg3_pwrsrc_switch_to_vmain(). GPIO1 driven high