Lines Matching defs:resp
4220 struct hwrm_func_qstats_ext_output *resp;
4236 resp = hwrm_req_hold(bp, req);
4239 hw_masks = &resp->rx_ucast_pkts;
4711 struct hwrm_func_drv_rgtr_output *resp;
4789 resp = hwrm_req_hold(bp, req);
4793 if (resp->flags &
4858 struct hwrm_tunnel_dst_port_alloc_output *resp;
4869 resp = hwrm_req_hold(bp, req);
4881 le16_to_cpu(resp->tunnel_dst_port_id);
4885 bp->nge_fw_dst_port_id = le16_to_cpu(resp->tunnel_dst_port_id);
4952 struct hwrm_cfa_ntuple_filter_alloc_output *resp;
5011 resp = hwrm_req_hold(bp, req);
5014 fltr->filter_id = resp->ntuple_filter_id;
5023 struct hwrm_cfa_l2_filter_alloc_output *resp;
5048 resp = hwrm_req_hold(bp, req);
5052 resp->l2_filter_id;
5355 struct hwrm_vnic_rss_qcfg_output *resp;
5364 resp = hwrm_req_hold(bp, req);
5366 bp->rss_hash_cfg = le32_to_cpu(resp->hash_type) ?: bp->rss_hash_cfg;
5431 struct hwrm_vnic_rss_cos_lb_ctx_alloc_output *resp;
5439 resp = hwrm_req_hold(bp, req);
5443 le16_to_cpu(resp->rss_cos_lb_ctx_id);
5560 struct hwrm_vnic_alloc_output *resp;
5588 resp = hwrm_req_hold(bp, req);
5591 vnic->fw_vnic_id = le32_to_cpu(resp->vnic_id);
5598 struct hwrm_vnic_qcaps_output *resp;
5611 resp = hwrm_req_hold(bp, req);
5614 u32 flags = le32_to_cpu(resp->flags);
5632 bp->max_tpa_v2 = le16_to_cpu(resp->max_aggs_supported);
5646 struct hwrm_ring_grp_alloc_output *resp;
5658 resp = hwrm_req_hold(bp, req);
5673 le32_to_cpu(resp->ring_group_id);
5707 struct hwrm_ring_alloc_output *resp;
5805 resp = hwrm_req_hold(bp, req);
5807 err = le16_to_cpu(resp->error_code);
5808 ring_id = le16_to_cpu(resp->ring_id);
6018 struct hwrm_ring_free_output *resp;
6034 resp = hwrm_req_hold(bp, req);
6036 error_code = le16_to_cpu(resp->error_code);
6154 struct hwrm_func_qcfg_output *resp;
6166 resp = hwrm_req_hold(bp, req);
6173 hw_resc->resv_tx_rings = le16_to_cpu(resp->alloc_tx_rings);
6177 hw_resc->resv_rx_rings = le16_to_cpu(resp->alloc_rx_rings);
6179 le32_to_cpu(resp->alloc_hw_ring_grps);
6180 hw_resc->resv_vnics = le16_to_cpu(resp->alloc_vnics);
6181 cp = le16_to_cpu(resp->alloc_cmpl_rings);
6182 stats = le16_to_cpu(resp->alloc_stat_ctx);
6197 hw_resc->resv_irqs = le16_to_cpu(resp->alloc_msix);
6209 struct hwrm_func_qcfg_output *resp;
6221 resp = hwrm_req_hold(bp, req);
6224 *tx_rings = le16_to_cpu(resp->alloc_tx_rings);
6640 struct hwrm_ring_aggint_qcaps_output *resp;
6660 resp = hwrm_req_hold(bp, req);
6663 coal_cap->cmpl_params = le32_to_cpu(resp->cmpl_params);
6664 coal_cap->nq_params = le32_to_cpu(resp->nq_params);
6666 le16_to_cpu(resp->num_cmpl_dma_aggr_max);
6668 le16_to_cpu(resp->num_cmpl_dma_aggr_during_int_max);
6670 le16_to_cpu(resp->cmpl_aggr_dma_tmr_max);
6672 le16_to_cpu(resp->cmpl_aggr_dma_tmr_during_int_max);
6674 le16_to_cpu(resp->int_lat_tmr_min_max);
6676 le16_to_cpu(resp->int_lat_tmr_max_max);
6678 le16_to_cpu(resp->num_cmpl_aggr_int_max);
6679 coal_cap->timer_units = le16_to_cpu(resp->timer_units);
6909 struct hwrm_stat_ctx_alloc_output *resp;
6923 resp = hwrm_req_hold(bp, req);
6934 cpr->hw_stats_ctx_id = le32_to_cpu(resp->stat_ctx_id);
6944 struct hwrm_func_qcfg_output *resp;
6955 resp = hwrm_req_hold(bp, req);
6964 vf->vlan = le16_to_cpu(resp->vlan) & VLAN_VID_MASK;
6966 bp->pf.registered_vfs = le16_to_cpu(resp->registered_vfs);
6969 flags = le16_to_cpu(resp->flags);
6982 switch (resp->port_partition_type) {
6986 bp->port_partition_type = resp->port_partition_type;
6990 resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEB)
6992 else if (resp->evb_mode == FUNC_QCFG_RESP_EVB_MODE_VEPA)
6997 bp->max_mtu = le16_to_cpu(resp->max_mtu_configured);
7010 bp->db_size = PAGE_ALIGN(le16_to_cpu(resp->l2_doorbell_bar_size_kb) *
7022 struct hwrm_func_backing_store_qcaps_output *resp)
7030 init_val = resp->ctx_kind_initializer;
7031 init_mask = le16_to_cpu(resp->ctx_init_mask);
7032 offset = &resp->qp_init_offset;
7040 offset = &resp->stat_init_offset;
7056 struct hwrm_func_backing_store_qcaps_output *resp;
7067 resp = hwrm_req_hold(bp, req);
7079 ctx->qp_max_entries = le32_to_cpu(resp->qp_max_entries);
7080 ctx->qp_min_qp1_entries = le16_to_cpu(resp->qp_min_qp1_entries);
7081 ctx->qp_max_l2_entries = le16_to_cpu(resp->qp_max_l2_entries);
7082 ctx->qp_entry_size = le16_to_cpu(resp->qp_entry_size);
7083 ctx->srq_max_l2_entries = le16_to_cpu(resp->srq_max_l2_entries);
7084 ctx->srq_max_entries = le32_to_cpu(resp->srq_max_entries);
7085 ctx->srq_entry_size = le16_to_cpu(resp->srq_entry_size);
7086 ctx->cq_max_l2_entries = le16_to_cpu(resp->cq_max_l2_entries);
7087 ctx->cq_max_entries = le32_to_cpu(resp->cq_max_entries);
7088 ctx->cq_entry_size = le16_to_cpu(resp->cq_entry_size);
7090 le16_to_cpu(resp->vnic_max_vnic_entries);
7092 le16_to_cpu(resp->vnic_max_ring_table_entries);
7093 ctx->vnic_entry_size = le16_to_cpu(resp->vnic_entry_size);
7094 ctx->stat_max_entries = le32_to_cpu(resp->stat_max_entries);
7095 ctx->stat_entry_size = le16_to_cpu(resp->stat_entry_size);
7096 ctx->tqm_entry_size = le16_to_cpu(resp->tqm_entry_size);
7098 le32_to_cpu(resp->tqm_min_entries_per_ring);
7100 le32_to_cpu(resp->tqm_max_entries_per_ring);
7101 ctx->tqm_entries_multiple = resp->tqm_entries_multiple;
7104 ctx->mrav_max_entries = le32_to_cpu(resp->mrav_max_entries);
7105 ctx->mrav_entry_size = le16_to_cpu(resp->mrav_entry_size);
7107 le16_to_cpu(resp->mrav_num_entries_units);
7108 ctx->tim_entry_size = le16_to_cpu(resp->tim_entry_size);
7109 ctx->tim_max_entries = le32_to_cpu(resp->tim_max_entries);
7111 bnxt_init_ctx_initializer(ctx, resp);
7113 ctx->tqm_fp_rings_count = resp->tqm_fp_rings_count;
7548 struct hwrm_func_resource_qcaps_output *resp;
7558 resp = hwrm_req_hold(bp, req);
7563 hw_resc->max_tx_sch_inputs = le16_to_cpu(resp->max_tx_scheduler_inputs);
7567 hw_resc->min_rsscos_ctxs = le16_to_cpu(resp->min_rsscos_ctx);
7568 hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx);
7569 hw_resc->min_cp_rings = le16_to_cpu(resp->min_cmpl_rings);
7570 hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings);
7571 hw_resc->min_tx_rings = le16_to_cpu(resp->min_tx_rings);
7572 hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings);
7573 hw_resc->min_rx_rings = le16_to_cpu(resp->min_rx_rings);
7574 hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings);
7575 hw_resc->min_hw_ring_grps = le16_to_cpu(resp->min_hw_ring_grps);
7576 hw_resc->max_hw_ring_grps = le16_to_cpu(resp->max_hw_ring_grps);
7577 hw_resc->min_l2_ctxs = le16_to_cpu(resp->min_l2_ctxs);
7578 hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs);
7579 hw_resc->min_vnics = le16_to_cpu(resp->min_vnics);
7580 hw_resc->max_vnics = le16_to_cpu(resp->max_vnics);
7581 hw_resc->min_stat_ctxs = le16_to_cpu(resp->min_stat_ctx);
7582 hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx);
7585 u16 max_msix = le16_to_cpu(resp->max_msix);
7595 le16_to_cpu(resp->vf_reservation_strategy);
7606 struct hwrm_port_mac_ptp_qcfg_output *resp;
7623 resp = hwrm_req_hold(bp, req);
7628 flags = resp->flags;
7643 ptp->refclk_regs[0] = le32_to_cpu(resp->ts_ref_clock_reg_lower);
7644 ptp->refclk_regs[1] = le32_to_cpu(resp->ts_ref_clock_reg_upper);
7670 struct hwrm_func_qcaps_output *resp;
7681 resp = hwrm_req_hold(bp, req);
7686 flags = le32_to_cpu(resp->flags);
7706 flags_ext = le32_to_cpu(resp->flags_ext);
7718 flags_ext2 = le32_to_cpu(resp->flags_ext2);
7727 hw_resc->max_rsscos_ctxs = le16_to_cpu(resp->max_rsscos_ctx);
7728 hw_resc->max_cp_rings = le16_to_cpu(resp->max_cmpl_rings);
7729 hw_resc->max_tx_rings = le16_to_cpu(resp->max_tx_rings);
7730 hw_resc->max_rx_rings = le16_to_cpu(resp->max_rx_rings);
7731 hw_resc->max_hw_ring_grps = le32_to_cpu(resp->max_hw_ring_grps);
7734 hw_resc->max_l2_ctxs = le16_to_cpu(resp->max_l2_ctxs);
7735 hw_resc->max_vnics = le16_to_cpu(resp->max_vnics);
7736 hw_resc->max_stat_ctxs = le16_to_cpu(resp->max_stat_ctx);
7741 pf->fw_fid = le16_to_cpu(resp->fid);
7742 pf->port_id = le16_to_cpu(resp->port_id);
7743 memcpy(pf->mac_addr, resp->mac_address, ETH_ALEN);
7744 pf->first_vf_id = le16_to_cpu(resp->first_vf_id);
7745 pf->max_vfs = le16_to_cpu(resp->max_vfs);
7746 pf->max_encap_records = le32_to_cpu(resp->max_encap_records);
7747 pf->max_decap_records = le32_to_cpu(resp->max_decap_records);
7748 pf->max_tx_em_flows = le32_to_cpu(resp->max_tx_em_flows);
7749 pf->max_tx_wm_flows = le32_to_cpu(resp->max_tx_wm_flows);
7750 pf->max_rx_em_flows = le32_to_cpu(resp->max_rx_em_flows);
7751 pf->max_rx_wm_flows = le32_to_cpu(resp->max_rx_wm_flows);
7766 vf->fw_fid = le16_to_cpu(resp->fid);
7767 memcpy(vf->mac_addr, resp->mac_address, ETH_ALEN);
7778 struct hwrm_dbg_qcaps_output *resp;
7791 resp = hwrm_req_hold(bp, req);
7796 bp->fw_dbg_cap = le32_to_cpu(resp->flags);
7832 struct hwrm_cfa_adv_flow_mgnt_qcaps_output *resp;
7844 resp = hwrm_req_hold(bp, req);
7849 flags = le32_to_cpu(resp->flags);
8006 struct hwrm_error_recovery_qcfg_output *resp;
8017 resp = hwrm_req_hold(bp, req);
8021 fw_health->flags = le32_to_cpu(resp->flags);
8027 fw_health->polling_dsecs = le32_to_cpu(resp->driver_polling_freq);
8029 le32_to_cpu(resp->master_func_wait_period);
8031 le32_to_cpu(resp->normal_func_wait_period);
8033 le32_to_cpu(resp->master_func_wait_period_after_reset);
8035 le32_to_cpu(resp->max_bailout_time_after_reset);
8037 le32_to_cpu(resp->fw_health_status_reg);
8039 le32_to_cpu(resp->fw_heartbeat_reg);
8041 le32_to_cpu(resp->fw_reset_cnt_reg);
8043 le32_to_cpu(resp->reset_inprogress_reg);
8045 le32_to_cpu(resp->reset_inprogress_reg_mask);
8046 fw_health->fw_reset_seq_cnt = resp->reg_array_cnt;
8053 le32_to_cpu(resp->reset_reg[i]);
8055 le32_to_cpu(resp->reset_reg_val[i]);
8057 resp->delay_after_reset[i];
8094 struct hwrm_queue_qportcfg_output *resp;
8104 resp = hwrm_req_hold(bp, req);
8109 if (!resp->max_configurable_queues) {
8113 bp->max_tc = resp->max_configurable_queues;
8114 bp->max_lltc = resp->max_configurable_lossless_queues;
8119 qptr = &resp->queue_id0;
8132 if (resp->queue_cfg_info & QUEUE_QPORTCFG_RESP_QUEUE_CFG_INFO_ASYM_CFG)
8163 struct hwrm_ver_get_output *resp;
8179 resp = hwrm_req_hold(bp, req);
8184 memcpy(&bp->ver_resp, resp, sizeof(struct hwrm_ver_get_output));
8186 bp->hwrm_spec_code = resp->hwrm_intf_maj_8b << 16 |
8187 resp->hwrm_intf_min_8b << 8 |
8188 resp->hwrm_intf_upd_8b;
8189 if (resp->hwrm_intf_maj_8b < 1) {
8191 resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b,
8192 resp->hwrm_intf_upd_8b);
8205 resp->hwrm_intf_maj_8b, resp->hwrm_intf_min_8b,
8206 resp->hwrm_intf_upd_8b);
8208 fw_maj = le16_to_cpu(resp->hwrm_fw_major);
8210 fw_min = le16_to_cpu(resp->hwrm_fw_minor);
8211 fw_bld = le16_to_cpu(resp->hwrm_fw_build);
8212 fw_rsv = le16_to_cpu(resp->hwrm_fw_patch);
8215 fw_maj = resp->hwrm_fw_maj_8b;
8216 fw_min = resp->hwrm_fw_min_8b;
8217 fw_bld = resp->hwrm_fw_bld_8b;
8218 fw_rsv = resp->hwrm_fw_rsvd_8b;
8225 if (strlen(resp->active_pkg_name)) {
8230 resp->active_pkg_name);
8234 bp->hwrm_cmd_timeout = le16_to_cpu(resp->def_req_timeout);
8237 bp->hwrm_cmd_max_timeout = le16_to_cpu(resp->max_req_timeout) * 1000;
8244 if (resp->hwrm_intf_maj_8b >= 1) {
8245 bp->hwrm_max_req_len = le16_to_cpu(resp->max_req_win_len);
8246 bp->hwrm_max_ext_req_len = le16_to_cpu(resp->max_ext_req_len);
8251 bp->chip_num = le16_to_cpu(resp->chip_num);
8252 bp->chip_rev = resp->chip_rev;
8253 if (bp->chip_num == CHIP_NUM_58700 && !resp->chip_rev &&
8254 !resp->chip_metal)
8257 dev_caps_cfg = le32_to_cpu(resp->dev_caps_cfg);
9572 static bool bnxt_phy_qcaps_no_speed(struct hwrm_port_phy_qcaps_output *resp)
9574 if (!resp->supported_speeds_auto_mode &&
9575 !resp->supported_speeds_force_mode &&
9576 !resp->supported_pam4_speeds_auto_mode &&
9577 !resp->supported_pam4_speeds_force_mode)
9585 struct hwrm_port_phy_qcaps_output *resp;
9596 resp = hwrm_req_hold(bp, req);
9601 bp->phy_flags = resp->flags | (le16_to_cpu(resp->flags2) << 8);
9602 if (resp->flags & PORT_PHY_QCAPS_RESP_FLAGS_EEE_SUPPORTED) {
9604 u16 fw_speeds = le16_to_cpu(resp->supported_speeds_eee_mode);
9607 bp->lpi_tmr_lo = le32_to_cpu(resp->tx_lpi_timer_low) &
9609 bp->lpi_tmr_hi = le32_to_cpu(resp->valid_tx_lpi_timer_high) &
9614 if (bnxt_phy_qcaps_no_speed(resp)) {
9625 if (resp->supported_speeds_auto_mode)
9627 le16_to_cpu(resp->supported_speeds_auto_mode);
9628 if (resp->supported_pam4_speeds_auto_mode)
9630 le16_to_cpu(resp->supported_pam4_speeds_auto_mode);
9632 bp->port_count = resp->port_cnt;
9649 struct hwrm_port_phy_qcfg_output *resp;
9659 resp = hwrm_req_hold(bp, req);
9670 memcpy(&link_info->phy_qcfg_resp, resp, sizeof(*resp));
9671 link_info->phy_link_status = resp->link;
9672 link_info->duplex = resp->duplex_cfg;
9674 link_info->duplex = resp->duplex_state;
9675 link_info->pause = resp->pause;
9676 link_info->auto_mode = resp->auto_mode;
9677 link_info->auto_pause_setting = resp->auto_pause;
9678 link_info->lp_pause = resp->link_partner_adv_pause;
9679 link_info->force_pause_setting = resp->force_pause;
9680 link_info->duplex_setting = resp->duplex_cfg;
9682 link_info->link_speed = le16_to_cpu(resp->link_speed);
9685 link_info->force_link_speed = le16_to_cpu(resp->force_link_speed);
9687 le16_to_cpu(resp->force_pam4_link_speed);
9688 link_info->support_speeds = le16_to_cpu(resp->support_speeds);
9689 link_info->support_pam4_speeds = le16_to_cpu(resp->support_pam4_speeds);
9690 link_info->auto_link_speeds = le16_to_cpu(resp->auto_link_speed_mask);
9692 le16_to_cpu(resp->auto_pam4_link_speed_mask);
9694 le16_to_cpu(resp->link_partner_adv_speeds);
9696 resp->link_partner_pam4_adv_speeds;
9697 link_info->preemphasis = le32_to_cpu(resp->preemphasis);
9698 link_info->phy_ver[0] = resp->phy_maj;
9699 link_info->phy_ver[1] = resp->phy_min;
9700 link_info->phy_ver[2] = resp->phy_bld;
9701 link_info->media_type = resp->media_type;
9702 link_info->phy_type = resp->phy_type;
9703 link_info->transceiver = resp->xcvr_pkg_type;
9704 link_info->phy_addr = resp->eee_config_phy_addr &
9706 link_info->module_status = resp->module_status;
9713 if (resp->eee_config_phy_addr &
9717 resp->link_partner_adv_eee_link_speed_mask);
9724 if (resp->eee_config_phy_addr &
9728 fw_speeds = le16_to_cpu(resp->adv_eee_link_speed_mask);
9732 if (resp->eee_config_phy_addr &
9737 tmr = resp->xcvr_identifier_type_tx_lpi_timer;
9746 link_info->fec_cfg = le16_to_cpu(resp->fec_cfg);
9747 link_info->active_fec_sig_mode = resp->active_fec_signal_mode;
9787 struct hwrm_port_phy_qcfg_output *resp = &link_info->phy_qcfg_resp;
9802 resp->phy_vendor_partnumber);
10057 struct hwrm_func_drv_if_change_output *resp;
10073 resp = hwrm_req_hold(bp, req);
10089 flags = le32_to_cpu(resp->flags);
10146 struct hwrm_port_led_qcaps_output *resp;
10160 resp = hwrm_req_hold(bp, req);
10166 if (resp->num_leds > 0 && resp->num_leds < BNXT_MAX_LED) {
10169 bp->num_leds = resp->num_leds;
10170 memcpy(bp->leds, &resp->led0_id, sizeof(bp->leds[0]) *
10189 struct hwrm_wol_filter_alloc_output *resp;
10202 resp = hwrm_req_hold(bp, req);
10205 bp->wol_filter_id = resp->wol_filter_id;
10228 struct hwrm_wol_filter_qcfg_output *resp;
10239 resp = hwrm_req_hold(bp, req);
10242 next_handle = le16_to_cpu(resp->next_handle);
10244 if (resp->wol_type ==
10247 bp->wol_filter_id = resp->wol_filter_id;
10272 struct hwrm_temp_monitor_query_output *resp;
10281 resp = hwrm_req_hold(bp, req);
10284 len = sprintf(buf, "%u\n", resp->temp * 1000); /* display millidegree */
10768 struct hwrm_port_phy_mdio_read_output *resp;
10789 resp = hwrm_req_hold(bp, req);
10792 *val = le16_to_cpu(resp->reg_data);
11493 struct hwrm_dbg_read_direct_output *resp;
11512 resp = hwrm_req_hold(bp, req);
11517 if (rc || resp->error_code) {
11532 struct hwrm_dbg_ring_info_get_output *resp;
11542 resp = hwrm_req_hold(bp, req);
11545 *prod = le32_to_cpu(resp->producer_index);
11546 *cons = le32_to_cpu(resp->consumer_index);
12442 struct hwrm_func_qcfg_output *resp;
12453 resp = hwrm_req_hold(bp, req);
12455 result = !!(le16_to_cpu(resp->flags) &