Lines Matching refs:val1
488 u32 val1;
492 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
493 val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
495 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
501 val1 = (bp->phy_addr << 21) | (reg << 16) |
504 BNX2_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
509 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_COMM);
510 if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
513 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_COMM);
514 val1 &= BNX2_EMAC_MDIO_COMM_DATA;
520 if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY) {
525 *val = val1;
530 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
531 val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
533 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
545 u32 val1;
549 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
550 val1 &= ~BNX2_EMAC_MDIO_MODE_AUTO_POLL;
552 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
558 val1 = (bp->phy_addr << 21) | (reg << 16) | val |
561 BNX2_WR(bp, BNX2_EMAC_MDIO_COMM, val1);
566 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_COMM);
567 if (!(val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)) {
573 if (val1 & BNX2_EMAC_MDIO_COMM_START_BUSY)
579 val1 = BNX2_RD(bp, BNX2_EMAC_MDIO_MODE);
580 val1 |= BNX2_EMAC_MDIO_MODE_AUTO_POLL;
582 BNX2_WR(bp, BNX2_EMAC_MDIO_MODE, val1);
6535 u32 val1, val2;
6537 pci_read_config_dword(bp->pdev, PCI_COMMAND, &val1);
6539 atomic_read(&bp->intr_sem), val1);
6540 pci_read_config_dword(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &val1);
6542 netdev_err(dev, "DEBUG: PCI_PM[%08x] PCI_MISC_CFG[%08x]\n", val1, val2);