Lines Matching refs:bw32
169 static inline void bw32(const struct b44 *bp,
208 bw32(bp, B44_CAM_DATA_LO, val);
212 bw32(bp, B44_CAM_DATA_HI, val);
213 bw32(bp, B44_CAM_CTRL, (CAM_CTRL_WRITE |
220 bw32(bp, B44_IMASK, 0);
233 bw32(bp, B44_IMASK, bp->imask);
240 bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
241 bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
254 bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
255 bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
349 bw32(bp, B44_RXCONFIG, val);
357 bw32(bp, B44_MAC_FLOW, val);
525 bw32(bp, B44_TX_CTRL, val);
553 bw32(bp, B44_TX_CTRL, val);
624 bw32(bp, B44_GPTIMER, 0);
835 bw32(bp, B44_DMARX_PTR, cons * sizeof(struct dma_desc));
921 bw32(bp, B44_ISTAT, istat);
1016 bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
1018 bw32(bp, B44_DMATX_PTR, entry * sizeof(struct dma_desc));
1247 bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
1266 bw32(bp, B44_RCV_LAZY, 0);
1267 bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
1269 bw32(bp, B44_DMATX_CTRL, 0);
1275 bw32(bp, B44_DMARX_CTRL, 0);
1290 bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
1296 bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
1308 bw32(bp, B44_ENET_CTRL, ENET_CTRL_EPSEL);
1315 bw32(bp, B44_DEVCTRL, (val & ~DEVCTRL_EPR));
1331 bw32(bp, B44_MAC_CTRL, MAC_CTRL_PHY_PDOWN);
1343 bw32(bp, B44_CAM_CTRL, 0);
1349 bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
1393 bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL);
1394 bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT));
1400 bw32(bp, B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
1401 bw32(bp, B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN);
1403 bw32(bp, B44_TX_WMARK, 56); /* XXX magic */
1405 bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
1408 bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE);
1409 bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset);
1410 bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE |
1412 bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset);
1414 bw32(bp, B44_DMARX_PTR, bp->rx_pending);
1417 bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ);
1421 bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE));
1484 bw32(bp, B44_FILT_ADDR, table_offset + i);
1485 bw32(bp, B44_FILT_DATA, pattern[i / sizeof(u32)]);
1568 bw32(bp, B44_WKUP_LEN, val);
1572 bw32(bp, B44_DEVCTRL, val | DEVCTRL_PFE);
1582 bw32(bp, SSB_TMSLOW, br32(bp, SSB_TMSLOW) | SSB_TMSLOW_PE);
1595 bw32(bp, B44_RXCONFIG, RXCONFIG_ALLMULTI);
1599 bw32(bp, B44_WKUP_LEN, WKUP_LEN_DISABLE);
1605 bw32(bp, B44_ADDR_LO, val);
1609 bw32(bp, B44_ADDR_HI, val);
1612 bw32(bp, B44_DEVCTRL, val | DEVCTRL_MPM | DEVCTRL_PFE);
1723 bw32(bp, B44_RXCONFIG, val);
1739 bw32(bp, B44_RXCONFIG, val);
1741 bw32(bp, B44_CAM_CTRL, val | CAM_CTRL_ENABLE);
2223 bw32(bp, B44_TX_CTRL, val);