Lines Matching refs:regs
516 * Remap the regs into kernel space - this is abuse of
521 ap->regs = ioremap(dev->base_addr, 0x4000);
522 if (!ap->regs) {
564 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
610 struct ace_regs __iomem *regs = ap->regs;
615 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
617 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
622 writel(1, ®s->Mb0Lo);
623 readl(®s->CpuCtrl); /* flush */
839 iounmap(ap->regs);
846 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
850 idx = readl(®s->CmdPrd);
852 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
855 writel(idx, ®s->CmdPrd);
862 struct ace_regs __iomem *regs;
874 regs = ap->regs;
883 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
884 readl(®s->HostCtrl); /* PCI write posting */
896 ®s->HostCtrl);
899 ®s->HostCtrl);
901 readl(®s->HostCtrl); /* PCI write posting */
906 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
907 readl(®s->CpuCtrl); /* PCI write posting */
908 writel(0, ®s->Mb0Lo);
910 tig_ver = readl(®s->HostCtrl) >> 28;
919 writel(0, ®s->LocalCtrl);
928 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
929 readl(®s->CpuBCtrl); /* PCI write posting */
935 writel(SRAM_BANK_512K, ®s->LocalCtrl);
936 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
956 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
959 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
961 readl(®s->ModeStat); /* PCI write posting */
988 writel(mac1, ®s->MacAddrHi);
989 writel(mac2, ®s->MacAddrLo);
1022 pci_state = readl(®s->PciState);
1108 writel(tmp, ®s->PciState);
1180 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1181 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1191 writel(0, ®s->EvtCsm);
1198 writel(0, ®s->CmdRng[i]);
1200 writel(0, ®s->CmdPrd);
1201 writel(0, ®s->CmdCsm);
1277 writel(TX_RING_BASE, ®s->WinBase);
1280 ap->tx_ring = (__force struct tx_desc *) regs->Window;
1312 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1313 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1315 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1316 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1319 writel(0, ®s->MaskInt);
1320 writel(1, ®s->IfIdx);
1326 writel(1, ®s->AssistState);
1329 writel(DEF_STAT, ®s->TuneStatTicks);
1330 writel(DEF_TRACE, ®s->TuneTrace);
1341 ®s->TuneTxCoalTicks);
1343 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1347 ®s->TuneRxCoalTicks);
1349 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1352 writel(trace[board_idx], ®s->TuneTrace);
1355 writel(tx_ratio[board_idx], ®s->TxBufRat);
1408 writel(tmp, ®s->TuneLink);
1410 writel(tmp, ®s->TuneFastLink);
1412 writel(ap->firmware_start, ®s->Pc);
1414 writel(0, ®s->Mb0Lo);
1426 ace_set_txprd(regs, ap, 0);
1427 writel(0, ®s->RxRetCsm);
1435 writel(1, ®s->AssistState); /* enable DMA */
1440 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1441 readl(®s->CpuCtrl);
1454 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1455 readl(®s->CpuCtrl);
1467 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1468 ®s->CpuBCtrl);
1469 writel(0, ®s->Mb0Lo);
1470 readl(®s->Mb0Lo);
1503 struct ace_regs __iomem *regs = ap->regs;
1509 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1511 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1513 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1515 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1517 writel(DEF_TX_RATIO, ®s->TxBufRat);
1521 ®s->TuneTxCoalTicks);
1524 ®s->TuneMaxTxDesc);
1527 ®s->TuneRxCoalTicks);
1530 ®s->TuneMaxRxDesc);
1532 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1542 struct ace_regs __iomem *regs = ap->regs;
1551 dev->name, (unsigned int)readl(®s->HostCtrl));
1625 struct ace_regs __iomem *regs = ap->regs;
1668 ace_issue_cmd(regs, &cmd);
1670 writel(idx, ®s->RxStdPrd);
1688 struct ace_regs __iomem *regs = ap->regs;
1725 writel(idx, ®s->RxMiniPrd);
1745 struct ace_regs __iomem *regs = ap->regs;
1785 ace_issue_cmd(regs, &cmd);
1787 writel(idx, ®s->RxJumboPrd);
1829 u32 state = readl(&ap->regs->GigLnkState);
1888 ace_issue_cmd(ap->regs, &cmd);
1890 writel(0, &((ap->regs)->RxJumboPrd));
2016 writel(idx, &ap->regs->RxRetCsm);
2097 struct ace_regs __iomem *regs = ap->regs;
2107 if (!(readl(®s->HostCtrl) & IN_INT))
2113 * writel(0, ®s->Mb0Lo).
2118 writel(0, ®s->Mb0Lo);
2119 readl(®s->Mb0Lo);
2149 evtcsm = readl(®s->EvtCsm);
2154 writel(evtcsm, ®s->EvtCsm);
2223 struct ace_regs __iomem *regs = ap->regs;
2231 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2236 ace_issue_cmd(regs, &cmd);
2241 ace_issue_cmd(regs, &cmd);
2251 ace_issue_cmd(regs, &cmd);
2262 ace_issue_cmd(regs, &cmd);
2278 struct ace_regs __iomem *regs = ap->regs;
2295 ace_issue_cmd(regs, &cmd);
2302 ace_issue_cmd(regs, &cmd);
2348 ace_issue_cmd(regs, &cmd);
2404 struct ace_regs __iomem *regs = ap->regs;
2490 ace_set_txprd(regs, ap, idx);
2539 struct ace_regs __iomem *regs = ap->regs;
2541 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2563 ace_issue_cmd(regs, &cmd);
2574 struct ace_regs __iomem *regs = ap->regs;
2587 link = readl(®s->GigLnkState);
2591 link = readl(®s->FastLnkState);
2613 ecmd->trace = readl(®s->TuneTrace);
2615 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2616 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2629 struct ace_regs __iomem *regs = ap->regs;
2632 link = readl(®s->GigLnkState);
2636 link = readl(®s->FastLnkState);
2675 writel(link, ®s->TuneLink);
2677 writel(link, ®s->TuneFastLink);
2683 ace_issue_cmd(regs, &cmd);
2709 struct ace_regs __iomem *regs = ap->regs;
2721 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2723 ®s->MacAddrLo);
2728 ace_issue_cmd(regs, &cmd);
2737 struct ace_regs __iomem *regs = ap->regs;
2744 ace_issue_cmd(regs, &cmd);
2750 ace_issue_cmd(regs, &cmd);
2758 ace_issue_cmd(regs, &cmd);
2764 ace_issue_cmd(regs, &cmd);
2778 ace_issue_cmd(regs, &cmd);
2783 ace_issue_cmd(regs, &cmd);
2792 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2802 static void ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2814 tdest = (void __iomem *) ®s->Window +
2816 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2829 static void ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2840 tdest = (void __iomem *) ®s->Window +
2842 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2865 struct ace_regs __iomem *regs = ap->regs;
2870 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2917 ace_clear(regs, 0x2000, 0x80000-0x2000);
2918 ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
2940 static void eeprom_start(struct ace_regs __iomem *regs)
2944 readl(®s->LocalCtrl);
2946 local = readl(®s->LocalCtrl);
2948 writel(local, ®s->LocalCtrl);
2949 readl(®s->LocalCtrl);
2953 writel(local, ®s->LocalCtrl);
2954 readl(®s->LocalCtrl);
2958 writel(local, ®s->LocalCtrl);
2959 readl(®s->LocalCtrl);
2963 writel(local, ®s->LocalCtrl);
2964 readl(®s->LocalCtrl);
2969 static void eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
2975 local = readl(®s->LocalCtrl);
2978 writel(local, ®s->LocalCtrl);
2979 readl(®s->LocalCtrl);
2988 writel(local, ®s->LocalCtrl);
2989 readl(®s->LocalCtrl);
2994 writel(local, ®s->LocalCtrl);
2995 readl(®s->LocalCtrl);
2999 writel(local, ®s->LocalCtrl);
3000 readl(®s->LocalCtrl);
3006 static int eeprom_check_ack(struct ace_regs __iomem *regs)
3011 local = readl(®s->LocalCtrl);
3013 writel(local, ®s->LocalCtrl);
3014 readl(®s->LocalCtrl);
3018 writel(local, ®s->LocalCtrl);
3019 readl(®s->LocalCtrl);
3023 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3026 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3027 readl(®s->LocalCtrl);
3034 static void eeprom_stop(struct ace_regs __iomem *regs)
3039 local = readl(®s->LocalCtrl);
3041 writel(local, ®s->LocalCtrl);
3042 readl(®s->LocalCtrl);
3046 writel(local, ®s->LocalCtrl);
3047 readl(®s->LocalCtrl);
3051 writel(local, ®s->LocalCtrl);
3052 readl(®s->LocalCtrl);
3056 writel(local, ®s->LocalCtrl);
3057 readl(®s->LocalCtrl);
3061 writel(local, ®s->LocalCtrl);
3072 struct ace_regs __iomem *regs = ap->regs;
3084 eeprom_start(regs);
3086 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3087 if (eeprom_check_ack(regs)) {
3094 eeprom_prep(regs, (offset >> 8) & 0xff);
3095 if (eeprom_check_ack(regs)) {
3103 eeprom_prep(regs, offset & 0xff);
3104 if (eeprom_check_ack(regs)) {
3112 eeprom_start(regs);
3113 eeprom_prep(regs, EEPROM_READ_SELECT);
3114 if (eeprom_check_ack(regs)) {
3123 local = readl(®s->LocalCtrl);
3125 writel(local, ®s->LocalCtrl);
3126 readl(®s->LocalCtrl);
3130 writel(local, ®s->LocalCtrl);
3131 readl(®s->LocalCtrl);
3136 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3139 local = readl(®s->LocalCtrl);
3141 writel(local, ®s->LocalCtrl);
3142 readl(®s->LocalCtrl);
3147 writel(local, ®s->LocalCtrl);
3148 readl(®s->LocalCtrl);
3155 writel(local, ®s->LocalCtrl);
3156 readl(®s->LocalCtrl);
3159 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3160 readl(®s->LocalCtrl);
3162 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3163 readl(®s->LocalCtrl);
3166 eeprom_stop(regs);