Lines Matching refs:db
95 struct emac_board_info *db;
104 struct emac_board_info *db = netdev_priv(dev);
108 reg_val = readl(db->membase + EMAC_MAC_SUPP_REG);
110 if (db->speed == SPEED_100)
112 writel(reg_val, db->membase + EMAC_MAC_SUPP_REG);
117 struct emac_board_info *db = netdev_priv(dev);
121 reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
123 if (db->duplex)
125 writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
130 struct emac_board_info *db = netdev_priv(dev);
136 if (db->speed != phydev->speed) {
137 spin_lock_irqsave(&db->lock, flags);
138 db->speed = phydev->speed;
140 spin_unlock_irqrestore(&db->lock, flags);
144 if (db->duplex != phydev->duplex) {
145 spin_lock_irqsave(&db->lock, flags);
146 db->duplex = phydev->duplex;
148 spin_unlock_irqrestore(&db->lock, flags);
153 if (phydev->link != db->link) {
155 db->speed = 0;
156 db->duplex = -1;
158 db->link = phydev->link;
169 struct emac_board_info *db = netdev_priv(dev);
175 phydev = of_phy_connect(db->ndev, db->phy_node,
177 db->phy_interface);
179 netdev_err(db->ndev, "could not find the PHY\n");
186 db->link = 0;
187 db->speed = 0;
188 db->duplex = -1;
198 static void emac_reset(struct emac_board_info *db)
200 dev_dbg(db->dev, "resetting device\n");
203 writel(0, db->membase + EMAC_CTL_REG);
205 writel(EMAC_CTL_RESET, db->membase + EMAC_CTL_REG);
220 emac_alloc_dma_req(struct emac_board_info *db,
230 req->db = db;
246 struct emac_board_info *db = req->db;
248 struct net_device *dev = db->ndev;
252 dma_unmap_single(db->dev, req->rxbuf, rxlen, DMA_FROM_DEVICE);
261 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
263 writel(reg_val, db->membase + EMAC_RX_CTL_REG);
266 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
268 writel(reg_val, db->membase + EMAC_INT_CTL_REG);
270 db->emacrx_completed_flag = 1;
274 static int emac_dma_inblk_32bit(struct emac_board_info *db,
283 rxbuf = dma_map_single(db->dev, rdptr, count, DMA_FROM_DEVICE);
284 ret = dma_mapping_error(db->dev, rxbuf);
286 dev_err(db->dev, "dma mapping error.\n");
290 desc = dmaengine_prep_slave_single(db->rx_chan, rxbuf, count,
294 dev_err(db->dev, "prepare slave single failed\n");
299 req = emac_alloc_dma_req(db, desc, skb, rxbuf, count);
301 dev_err(db->dev, "alloc emac dma req error.\n");
312 dev_err(db->dev, "dma submit error.\n");
316 dma_async_issue_pending(db->rx_chan);
326 dma_unmap_single(db->dev, rxbuf, count, DMA_FROM_DEVICE);
340 struct emac_board_info *db = netdev_priv(dev);
342 return db->msg_enable;
347 struct emac_board_info *db = netdev_priv(dev);
349 db->msg_enable = value;
363 struct emac_board_info *db = netdev_priv(ndev);
367 reg_val = readl(db->membase + EMAC_TX_MODE_REG);
370 db->membase + EMAC_TX_MODE_REG);
374 reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
377 db->membase + EMAC_MAC_CTL0_REG);
380 reg_val = readl(db->membase + EMAC_MAC_CTL1_REG);
384 writel(reg_val, db->membase + EMAC_MAC_CTL1_REG);
387 writel(EMAC_MAC_IPGT_FULL_DUPLEX, db->membase + EMAC_MAC_IPGT_REG);
391 db->membase + EMAC_MAC_IPGR_REG);
395 db->membase + EMAC_MAC_CLRT_REG);
399 db->membase + EMAC_MAC_MAXF_REG);
406 struct emac_board_info *db = netdev_priv(ndev);
410 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
421 db->membase + EMAC_RX_CTL_REG);
426 struct emac_board_info *db = netdev_priv(ndev);
431 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
433 writel(reg_val, db->membase + EMAC_RX_CTL_REG);
438 reg_val = readl(db->membase + EMAC_MAC_CTL0_REG);
440 writel(reg_val, db->membase + EMAC_MAC_CTL0_REG);
443 reg_val = readl(db->membase + EMAC_MAC_MCFG_REG);
446 writel(reg_val, db->membase + EMAC_MAC_MCFG_REG);
449 writel(0x0, db->membase + EMAC_RX_FBC_REG);
452 writel(0, db->membase + EMAC_INT_CTL_REG);
453 reg_val = readl(db->membase + EMAC_INT_STA_REG);
454 writel(reg_val, db->membase + EMAC_INT_STA_REG);
463 dev_addr[2], db->membase + EMAC_MAC_A1_REG);
465 dev_addr[5], db->membase + EMAC_MAC_A0_REG);
475 struct emac_board_info *db = netdev_priv(dev);
483 dev_addr[2], db->membase + EMAC_MAC_A1_REG);
485 dev_addr[5], db->membase + EMAC_MAC_A0_REG);
493 struct emac_board_info *db = netdev_priv(dev);
497 spin_lock_irqsave(&db->lock, flags);
503 reg_val = readl(db->membase + EMAC_CTL_REG);
505 db->membase + EMAC_CTL_REG);
508 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
510 writel(reg_val, db->membase + EMAC_INT_CTL_REG);
512 spin_unlock_irqrestore(&db->lock, flags);
518 struct emac_board_info *db = netdev_priv(dev);
521 if (netif_msg_timer(db))
522 dev_err(db->dev, "tx time out.\n");
525 spin_lock_irqsave(&db->lock, flags);
528 emac_reset(db);
535 spin_unlock_irqrestore(&db->lock, flags);
543 struct emac_board_info *db = netdev_priv(dev);
547 channel = db->tx_fifo_stat & 3;
553 spin_lock_irqsave(&db->lock, flags);
555 writel(channel, db->membase + EMAC_TX_INS_REG);
557 emac_outblk_32bit(db->membase + EMAC_TX_IO_DATA_REG,
561 db->tx_fifo_stat |= 1 << channel;
565 writel(skb->len, db->membase + EMAC_TX_PL0_REG);
567 writel(readl(db->membase + EMAC_TX_CTL0_REG) | 1,
568 db->membase + EMAC_TX_CTL0_REG);
574 writel(skb->len, db->membase + EMAC_TX_PL1_REG);
576 writel(readl(db->membase + EMAC_TX_CTL1_REG) | 1,
577 db->membase + EMAC_TX_CTL1_REG);
583 if ((db->tx_fifo_stat & 3) == 3) {
588 spin_unlock_irqrestore(&db->lock, flags);
599 static void emac_tx_done(struct net_device *dev, struct emac_board_info *db,
603 db->tx_fifo_stat &= ~(tx_status & 3);
609 if (netif_msg_tx_done(db))
610 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
619 struct emac_board_info *db = netdev_priv(dev);
632 rxcount = readl(db->membase + EMAC_RX_FBC_REG);
634 if (netif_msg_rx_status(db))
635 dev_dbg(db->dev, "RXCount: %x\n", rxcount);
638 db->emacrx_completed_flag = 1;
639 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
643 writel(reg_val, db->membase + EMAC_INT_CTL_REG);
646 rxcount = readl(db->membase + EMAC_RX_FBC_REG);
651 reg_val = readl(db->membase + EMAC_RX_IO_DATA_REG);
652 if (netif_msg_rx_status(db))
653 dev_dbg(db->dev, "receive header: %x\n", reg_val);
656 reg_val = readl(db->membase + EMAC_CTL_REG);
658 db->membase + EMAC_CTL_REG);
661 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
663 db->membase + EMAC_RX_CTL_REG);
666 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
670 reg_val = readl(db->membase + EMAC_CTL_REG);
672 db->membase + EMAC_CTL_REG);
673 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
677 writel(reg_val, db->membase + EMAC_INT_CTL_REG);
679 db->emacrx_completed_flag = 1;
687 rxhdr = readl(db->membase + EMAC_RX_IO_DATA_REG);
689 if (netif_msg_rx_status(db))
690 dev_dbg(db->dev, "rxhdr: %x\n", *((int *)(&rxhdr)));
695 if (netif_msg_rx_status(db))
696 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
702 if (netif_msg_rx_err(db))
703 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
710 if (netif_msg_rx_err(db))
711 dev_dbg(db->dev, "crc error\n");
716 if (netif_msg_rx_err(db))
717 dev_dbg(db->dev, "length error\n");
731 if (netif_msg_rx_status(db))
732 dev_dbg(db->dev, "RxLen %x\n", rxlen);
734 if (rxlen >= dev->mtu && db->rx_chan) {
735 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
737 writel(reg_val, db->membase + EMAC_RX_CTL_REG);
738 if (!emac_dma_inblk_32bit(db, skb, rdptr, rxlen))
742 reg_val = readl(db->membase + EMAC_RX_CTL_REG);
744 writel(reg_val, db->membase + EMAC_RX_CTL_REG);
747 emac_inblk_32bit(db->membase + EMAC_RX_IO_DATA_REG,
762 struct emac_board_info *db = netdev_priv(dev);
768 spin_lock(&db->lock);
771 writel(0, db->membase + EMAC_INT_CTL_REG);
775 int_status = readl(db->membase + EMAC_INT_STA_REG);
777 writel(int_status, db->membase + EMAC_INT_STA_REG);
779 if (netif_msg_intr(db))
780 dev_dbg(db->dev, "emac interrupt %02x\n", int_status);
783 if ((int_status & 0x100) && (db->emacrx_completed_flag == 1)) {
785 db->emacrx_completed_flag = 0;
791 emac_tx_done(dev, db, int_status);
797 if (db->emacrx_completed_flag == 1) {
798 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
800 writel(reg_val, db->membase + EMAC_INT_CTL_REG);
802 reg_val = readl(db->membase + EMAC_INT_CTL_REG);
804 writel(reg_val, db->membase + EMAC_INT_CTL_REG);
807 spin_unlock(&db->lock);
829 struct emac_board_info *db = netdev_priv(dev);
832 if (netif_msg_ifup(db))
833 dev_dbg(db->dev, "enabling %s\n", dev->name);
839 emac_reset(db);
858 struct emac_board_info *db = netdev_priv(dev);
861 writel(0, db->membase + EMAC_INT_CTL_REG);
864 reg_val = readl(db->membase + EMAC_INT_STA_REG);
865 writel(reg_val, db->membase + EMAC_INT_STA_REG);
868 reg_val = readl(db->membase + EMAC_CTL_REG);
870 writel(reg_val, db->membase + EMAC_CTL_REG);
878 struct emac_board_info *db = netdev_priv(ndev);
880 if (netif_msg_ifdown(db))
881 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
911 static int emac_configure_dma(struct emac_board_info *db)
913 struct platform_device *pdev = db->pdev;
914 struct net_device *ndev = db->ndev;
928 db->emac_rx_fifo = regs->start + EMAC_RX_IO_DATA_REG;
930 db->rx_chan = dma_request_chan(&pdev->dev, "rx");
931 if (IS_ERR(db->rx_chan)) {
934 err = PTR_ERR(db->rx_chan);
941 conf.src_addr = db->emac_rx_fifo;
946 err = dmaengine_slave_config(db->rx_chan, &conf);
956 dma_release_channel(db->rx_chan);
959 db->rx_chan = NULL;
968 struct emac_board_info *db;
980 db = netdev_priv(ndev);
982 db->dev = &pdev->dev;
983 db->ndev = ndev;
984 db->pdev = pdev;
985 db->msg_enable = netif_msg_init(debug, EMAC_DEFAULT_MSG_ENABLE);
987 spin_lock_init(&db->lock);
989 db->membase = of_iomap(np, 0);
990 if (!db->membase) {
997 ndev->base_addr = (unsigned long)db->membase;
1005 if (emac_configure_dma(db))
1008 db->clk = devm_clk_get(&pdev->dev, NULL);
1009 if (IS_ERR(db->clk)) {
1010 ret = PTR_ERR(db->clk);
1014 ret = clk_prepare_enable(db->clk);
1026 db->phy_node = of_parse_phandle(np, "phy-handle", 0);
1027 if (!db->phy_node)
1028 db->phy_node = of_parse_phandle(np, "phy", 0);
1029 if (!db->phy_node) {
1044 db->emacrx_completed_flag = 1;
1046 emac_reset(db);
1065 ndev->name, db->membase, ndev->irq, ndev->dev_addr);
1072 clk_disable_unprepare(db->clk);
1075 dma_release_channel(db->rx_chan);
1077 iounmap(db->membase);
1079 dev_err(db->dev, "not found (%d).\n", ret);
1089 struct emac_board_info *db = netdev_priv(ndev);
1091 if (db->rx_chan) {
1092 dmaengine_terminate_all(db->rx_chan);
1093 dma_release_channel(db->rx_chan);
1098 clk_disable_unprepare(db->clk);
1100 iounmap(db->membase);
1121 struct emac_board_info *db = netdev_priv(ndev);
1123 emac_reset(db);