Lines Matching refs:txdma
793 &adapter->regs->txdma.csr);
1638 struct txdma_regs __iomem *txdma = &adapter->regs->txdma;
1642 writel(upper_32_bits(tx_ring->tx_desc_ring_pa), &txdma->pr_base_hi);
1643 writel(lower_32_bits(tx_ring->tx_desc_ring_pa), &txdma->pr_base_lo);
1646 writel(NUM_DESC_PER_RING_TX - 1, &txdma->pr_num_des);
1649 writel(upper_32_bits(tx_ring->tx_status_pa), &txdma->dma_wb_base_hi);
1650 writel(lower_32_bits(tx_ring->tx_status_pa), &txdma->dma_wb_base_lo);
1654 writel(0, &txdma->service_request);
1721 &adapter->regs->txdma.csr);
2571 writel(tx_ring->send_idx, &adapter->regs->txdma.service_request);
2742 serviced = readl(&adapter->regs->txdma.new_service_complete);
2891 regs_buff[num++] = readl(&aregs->txdma.csr);
2892 regs_buff[num++] = readl(&aregs->txdma.pr_base_hi);
2893 regs_buff[num++] = readl(&aregs->txdma.pr_base_lo);
2894 regs_buff[num++] = readl(&aregs->txdma.pr_num_des);
2895 regs_buff[num++] = readl(&aregs->txdma.txq_wr_addr);
2896 regs_buff[num++] = readl(&aregs->txdma.txq_wr_addr_ext);
2897 regs_buff[num++] = readl(&aregs->txdma.txq_rd_addr);
2898 regs_buff[num++] = readl(&aregs->txdma.dma_wb_base_hi);
2899 regs_buff[num++] = readl(&aregs->txdma.dma_wb_base_lo);
2900 regs_buff[num++] = readl(&aregs->txdma.service_request);
2901 regs_buff[num++] = readl(&aregs->txdma.service_complete);
2902 regs_buff[num++] = readl(&aregs->txdma.cache_rd_index);
2903 regs_buff[num++] = readl(&aregs->txdma.cache_wr_index);
2904 regs_buff[num++] = readl(&aregs->txdma.tx_dma_error);
2905 regs_buff[num++] = readl(&aregs->txdma.desc_abort_cnt);
2906 regs_buff[num++] = readl(&aregs->txdma.payload_abort_cnt);
2907 regs_buff[num++] = readl(&aregs->txdma.writeback_abort_cnt);
2908 regs_buff[num++] = readl(&aregs->txdma.desc_timeout_cnt);
2909 regs_buff[num++] = readl(&aregs->txdma.payload_timeout_cnt);
2910 regs_buff[num++] = readl(&aregs->txdma.writeback_timeout_cnt);
2911 regs_buff[num++] = readl(&aregs->txdma.desc_error_cnt);
2912 regs_buff[num++] = readl(&aregs->txdma.payload_error_cnt);
2913 regs_buff[num++] = readl(&aregs->txdma.writeback_error_cnt);
2914 regs_buff[num++] = readl(&aregs->txdma.dropped_tlp_cnt);
2915 regs_buff[num++] = readl(&aregs->txdma.new_service_complete);
2916 regs_buff[num++] = readl(&aregs->txdma.ethernet_packet_cnt);
3417 u32 txdma_err = readl(&iomem->txdma.tx_dma_error);