Lines Matching refs:status
436 and status registers available in each.
463 /* Bits in the general status register. */
545 __le32 status;
549 /* Values for the Rx status entry. */
565 __le32 status; /* bits 0:12 length, others see below. */
577 /* Values for the Tx status entry. */
613 void __iomem *cb_fn_base; /* CardBus function status addr space. */
725 int wait; /* Time before we check media status. */
1412 pr_info(" MII transceiver found at address %d, status %4x.\n",
1630 pr_debug("%s: vortex_up() irq %d media status %4.4x.\n",
1684 vp->rx_ring[i].status = 0;
1697 /* Allow status bits to be seen. */
1739 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1887 pr_err("%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1939 vortex_error(struct net_device *dev, int status)
1947 pr_err("%s: vortex_error(), status=0x%x\n", dev->name, status);
1950 if (status & TxComplete) { /* Really "TxError" for us. */
1955 pr_err("%s: Transmit error, Tx status register %2.2x.\n",
1977 if (status & RxEarly) /* Rx early is unused. */
1980 if (status & StatsFull) { /* Empty statistics. */
1998 if (status & IntReq) { /* Restore all interrupt sources. */
2002 if (status & HostError) {
2013 pr_err("%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2087 /* Clear the Tx status stack. */
2095 pr_debug("%s: Tx error, status %2.2x.\n",
2104 iowrite8(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2150 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2152 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2210 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2232 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2258 int status;
2265 status = ioread16(ioaddr + EL3_STATUS);
2268 pr_debug("vortex_interrupt(). status=0x%4x\n", status);
2270 if ((status & IntLatch) == 0)
2274 if (status & IntReq) {
2275 status |= vp->deferred;
2279 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2283 pr_debug("%s: interrupt, status %4.4x, latency %d ticks.\n",
2284 dev->name, status, ioread8(ioaddr + Timer));
2291 pr_debug("%s: In interrupt loop, status %4.4x.\n",
2292 dev->name, status);
2293 if (status & RxComplete)
2296 if (status & TxAvailable) {
2304 if (status & DMADone) {
2325 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2326 if (status == 0xffff)
2328 if (status & RxEarly)
2331 vortex_error(dev, status);
2337 pr_warn("%s: Too much work in interrupt, status %4.4x\n",
2338 dev->name, status);
2341 vp->deferred |= status;
2345 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2352 } while ((status = ioread16(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2358 pr_debug("%s: exiting interrupt, status %4.4x.\n",
2359 dev->name, status);
2374 int status;
2383 status = ioread16(ioaddr + EL3_STATUS);
2386 pr_debug("boomerang_interrupt. status=0x%4x\n", status);
2388 if ((status & IntLatch) == 0)
2392 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2394 pr_debug("boomerang_interrupt(1): status = 0xffff\n");
2398 if (status & IntReq) {
2399 status |= vp->deferred;
2404 pr_debug("%s: interrupt, status %4.4x, latency %d ticks.\n",
2405 dev->name, status, ioread8(ioaddr + Timer));
2408 pr_debug("%s: In interrupt loop, status %4.4x.\n",
2409 dev->name, status);
2410 if (status & UpComplete) {
2417 if (status & DownComplete) {
2428 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2469 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2470 vortex_error(dev, status);
2473 pr_warn("%s: Too much work in interrupt, status %4.4x\n",
2474 dev->name, status);
2477 vp->deferred |= status;
2481 } while ((status = ioread16(ioaddr + EL3_CMD)) & IntLatch);
2491 } while ((status = ioread16(ioaddr + EL3_STATUS)) & IntLatch);
2495 pr_debug("%s: exiting interrupt, status %4.4x.\n",
2496 dev->name, status);
2530 pr_debug("vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2536 pr_debug(" Rx error: status %2.2x.\n", rx_error);
2550 pr_debug("Receiving packet size %d status %4.4x.\n",
2600 pr_debug("boomerang_rx(): status %4.4x\n", ioread16(ioaddr+EL3_STATUS));
2602 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2608 pr_debug(" Rx error: status %2.2x.\n", rx_error);
2623 pr_debug("Receiving packet size %d status %4.4x.\n",
2678 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2736 pr_debug("%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2814 pr_err(" %d: @%p length %8.8x status %8.8x\n",
2816 le32_to_cpu(vp->tx_ring[i].status));