Lines Matching refs:reg
10 int sja1105_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg)
18 addr = (mmd << 16) | reg;
23 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID1)
25 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID2)
36 int reg, u16 val)
43 addr = (mmd << 16) | reg;
52 int sja1110_pcs_mdio_read_c45(struct mii_bus *bus, int phy, int mmd, int reg)
65 addr = (mmd << 16) | reg;
67 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID1)
69 if (mmd == MDIO_MMD_VEND2 && (reg & GENMASK(15, 0)) == MII_PHYSID2)
97 int sja1110_pcs_mdio_write_c45(struct mii_bus *bus, int phy, int reg, int mmd,
111 addr = (mmd << 16) | reg;
152 static int sja1105_base_t1_mdio_read_c22(struct mii_bus *bus, int phy, int reg)
160 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C22, reg & 0x1f);
170 int mmd, int reg)
180 rc = sja1105_xfer_u32(priv, SPI_WRITE, addr, ®, NULL);
193 static int sja1105_base_t1_mdio_write_c22(struct mii_bus *bus, int phy, int reg,
201 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C22, reg & 0x1f);
209 int mmd, int reg, u16 val)
219 rc = sja1105_xfer_u32(priv, SPI_WRITE, addr, ®, NULL);
230 static int sja1105_base_tx_mdio_read(struct mii_bus *bus, int phy, int reg)
238 rc = sja1105_xfer_u32(priv, SPI_READ, regs->mdio_100base_tx + reg,
246 static int sja1105_base_tx_mdio_write(struct mii_bus *bus, int phy, int reg,
254 return sja1105_xfer_u32(priv, SPI_WRITE, regs->mdio_100base_tx + reg,