Lines Matching refs:addr
14 u64 addr;
18 addr = (mmd << 16) | reg;
28 rc = sja1105_xfer_u32(priv, SPI_READ, addr, &tmp, NULL);
40 u64 addr;
43 addr = (mmd << 16) | reg;
49 return sja1105_xfer_u32(priv, SPI_WRITE, addr, &tmp, NULL);
58 u64 addr;
65 addr = (mmd << 16) | reg;
72 bank = addr >> 8;
73 offset = addr & GENMASK(7, 0);
104 u64 addr;
111 addr = (mmd << 16) | reg;
113 bank = addr >> 8;
114 offset = addr & GENMASK(7, 0);
156 u64 addr;
160 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C22, reg & 0x1f);
162 rc = sja1105_xfer_u32(priv, SPI_READ, addr, &tmp, NULL);
174 u64 addr;
178 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_ADDR, mmd);
180 rc = sja1105_xfer_u32(priv, SPI_WRITE, addr, ®, NULL);
184 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_DATA, mmd);
186 rc = sja1105_xfer_u32(priv, SPI_READ, addr, &tmp, NULL);
198 u64 addr;
201 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C22, reg & 0x1f);
205 return sja1105_xfer_u32(priv, SPI_WRITE, addr, &tmp, NULL);
213 u64 addr;
217 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_ADDR, mmd);
219 rc = sja1105_xfer_u32(priv, SPI_WRITE, addr, ®, NULL);
223 addr = sja1105_base_t1_encode_addr(priv, phy, SJA1105_C45_DATA, mmd);
227 return sja1105_xfer_u32(priv, SPI_WRITE, addr, &tmp, NULL);