Lines Matching refs:cmd_cfg
259 u32 cmd_cfg;
261 cmd_cfg = a5psw_reg_readl(a5psw, A5PSW_CMD_CFG(port));
262 cmd_cfg &= ~(A5PSW_CMD_CFG_RX_ENA | A5PSW_CMD_CFG_TX_ENA);
263 a5psw_reg_writel(a5psw, A5PSW_CMD_CFG(port), cmd_cfg);
272 u32 cmd_cfg = A5PSW_CMD_CFG_RX_ENA | A5PSW_CMD_CFG_TX_ENA |
277 cmd_cfg |= A5PSW_CMD_CFG_ETH_SPEED;
280 cmd_cfg |= A5PSW_CMD_CFG_HD_ENA;
282 cmd_cfg |= A5PSW_CMD_CFG_CNTL_FRM_ENA;
285 cmd_cfg &= ~A5PSW_CMD_CFG_PAUSE_IGNORE;
287 a5psw_reg_writel(a5psw, A5PSW_CMD_CFG(port), cmd_cfg);