Lines Matching defs:ports
8 * integrated PHYs for the user facing ports, and an extension interface which
35 * The driver uses DSA to integrate the 4 user and 1 extension ports into the
36 * kernel. Netdevices are created for the user ports, as are PHY devices for
67 * In the same family of chips, some carry up to 8 user ports and up to 2
68 * extension ports. Where possible this driver tries to make things generic, but
254 /* CPU port mask register - controls which ports are treated as CPU ports */
590 * @mask: port mask of ports that parse should parse CPU tags
634 * @ports: per-port data
644 struct rtl8365mb_port ports[RTL8365MB_MAX_NUM_PORTS];
1042 * we have to support it for ports with integrated PHY.
1096 p = &mb->ports[port];
1124 p = &mb->ports[port];
1147 * largest MTU of the slave ports. Because the switch only has a global
1460 stats = &mb->ports[port].stats;
1481 spin_lock(&mb->ports[port].stats_lock);
1512 spin_unlock(&mb->ports[port].stats_lock);
1535 p = &mb->ports[port];
1553 struct rtl8365mb_port *p = &mb->ports[i];
1574 struct rtl8365mb_port *p = &mb->ports[i];
1986 /* Configure ports */
1988 struct rtl8365mb_port *p = &mb->ports[i];
2003 /* Set the initial STP state of all ports to DISABLED, otherwise
2004 * ports will still forward frames to the CPU despite being