Lines Matching refs:mpcs
28 irqreturn_t (*handle_irq)(struct mv88e639x_pcs *mpcs);
31 static int mv88e639x_read(struct mv88e639x_pcs *mpcs, u16 regnum, u16 *val)
35 err = mdiodev_c45_read(&mpcs->mdio, MDIO_MMD_PHYXS, regnum);
44 static int mv88e639x_write(struct mv88e639x_pcs *mpcs, u16 regnum, u16 val)
46 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, val);
49 static int mv88e639x_modify(struct mv88e639x_pcs *mpcs, u16 regnum, u16 mask,
52 return mdiodev_c45_modify(&mpcs->mdio, MDIO_MMD_PHYXS, regnum, mask,
56 static int mv88e639x_modify_changed(struct mv88e639x_pcs *mpcs, u16 regnum,
59 return mdiodev_c45_modify_changed(&mpcs->mdio, MDIO_MMD_PHYXS, regnum,
67 struct mv88e639x_pcs *mpcs;
69 mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);
70 if (!mpcs)
73 mpcs->mdio.dev.parent = dev;
74 mpcs->mdio.bus = bus;
75 mpcs->mdio.addr = addr;
77 snprintf(mpcs->name, sizeof(mpcs->name),
80 return mpcs;
85 struct mv88e639x_pcs *mpcs = dev_id;
88 handler = READ_ONCE(mpcs->handle_irq);
92 return handler(mpcs);
95 static int mv88e639x_pcs_setup_irq(struct mv88e639x_pcs *mpcs,
103 mpcs->sgmii_pcs.poll = true;
104 mpcs->xg_pcs.poll = true;
108 mpcs->irq = irq;
111 IRQF_ONESHOT, mpcs->name, mpcs);
116 struct mv88e639x_pcs *mpcs = chip->ports[port].pcs_private;
118 if (!mpcs)
121 if (mpcs->irq)
122 free_irq(mpcs->irq, mpcs);
124 kfree(mpcs);
134 static irqreturn_t mv88e639x_sgmii_handle_irq(struct mv88e639x_pcs *mpcs)
139 err = mv88e639x_read(mpcs, MV88E6390_SGMII_INT_STATUS, &int_status);
145 phylink_pcs_change(&mpcs->sgmii_pcs,
154 static int mv88e639x_sgmii_pcs_control_irq(struct mv88e639x_pcs *mpcs,
163 return mv88e639x_modify(mpcs, MV88E6390_SGMII_INT_ENABLE,
168 static int mv88e639x_sgmii_pcs_control_pwr(struct mv88e639x_pcs *mpcs,
180 return mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR, mask, val);
185 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
188 mpcs->handle_irq = mv88e639x_sgmii_handle_irq;
190 return mv88e639x_sgmii_pcs_control_irq(mpcs, !!mpcs->irq);
195 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
197 mv88e639x_sgmii_pcs_control_irq(mpcs, false);
198 mv88e639x_sgmii_pcs_control_pwr(mpcs, false);
204 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
206 mv88e639x_sgmii_pcs_control_pwr(mpcs, false);
209 static int mv88e6390_erratum_3_14(struct mv88e639x_pcs *mpcs)
224 err = mdiobus_c45_write(mpcs->mdio.bus, lanes[i],
230 err = mdiobus_c45_write(mpcs->mdio.bus, lanes[i],
243 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
246 mv88e639x_sgmii_pcs_control_pwr(mpcs, true);
248 if (mpcs->erratum_3_14) {
249 err = mv88e6390_erratum_3_14(mpcs);
251 dev_err(mpcs->mdio.dev.parent,
262 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
266 err = mv88e639x_read(mpcs, MV88E6390_SGMII_BMSR, &bmsr);
268 dev_err(mpcs->mdio.dev.parent,
275 err = mv88e639x_read(mpcs, MV88E6390_SGMII_LPA, &lpa);
277 dev_err(mpcs->mdio.dev.parent,
284 err = mv88e639x_read(mpcs, MV88E6390_SGMII_PHY_STATUS, &status);
286 dev_err(mpcs->mdio.dev.parent,
293 mv88e6xxx_pcs_decode_state(mpcs->mdio.dev.parent, bmsr, lpa, status,
303 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
312 mpcs->interface = interface;
314 err = mv88e639x_modify_changed(mpcs, MV88E6390_SGMII_ADVERTISE,
321 err = mv88e639x_read(mpcs, MV88E6390_SGMII_BMCR, &val);
334 return mv88e639x_write(mpcs, MV88E6390_SGMII_BMCR, bmcr);
339 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
341 mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR,
350 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
359 err = mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR,
363 dev_err(mpcs->mdio.dev.parent,
384 static int mv88e639x_xg_pcs_enable(struct mv88e639x_pcs *mpcs)
386 return mv88e639x_modify(mpcs, MV88E6390_10G_CTRL1,
391 static void mv88e639x_xg_pcs_disable(struct mv88e639x_pcs *mpcs)
393 mv88e639x_modify(mpcs, MV88E6390_10G_CTRL1, MDIO_CTRL1_LPOWER,
400 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
406 err = mv88e639x_read(mpcs, MV88E6390_10G_STAT1, &status);
408 dev_err(mpcs->mdio.dev.parent,
449 struct mv88e639x_pcs *mpcs;
451 mpcs = chip->ports[port].pcs_private;
452 if (!mpcs)
459 return &mpcs->sgmii_pcs;
462 if (!mpcs->supports_5g)
469 return &mpcs->xg_pcs;
478 static irqreturn_t mv88e6390_xg_handle_irq(struct mv88e639x_pcs *mpcs)
483 err = mv88e639x_read(mpcs, MV88E6390_10G_INT_STATUS, &int_status);
489 phylink_pcs_change(&mpcs->xg_pcs,
498 static int mv88e6390_xg_control_irq(struct mv88e639x_pcs *mpcs, bool enable)
505 return mv88e639x_modify(mpcs, MV88E6390_10G_INT_ENABLE,
512 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
515 err = mv88e639x_xg_pcs_enable(mpcs);
519 mpcs->handle_irq = mv88e6390_xg_handle_irq;
521 return mv88e6390_xg_control_irq(mpcs, !!mpcs->irq);
526 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
528 mv88e6390_xg_control_irq(mpcs, false);
529 mv88e639x_xg_pcs_disable(mpcs);
539 static int mv88e6390_pcs_enable_checker(struct mv88e639x_pcs *mpcs)
541 return mv88e639x_modify(mpcs, MV88E6390_PG_CONTROL,
548 struct mv88e639x_pcs *mpcs;
560 mpcs = mv88e639x_pcs_alloc(dev, bus, lane, port);
561 if (!mpcs)
564 mpcs->sgmii_pcs.ops = &mv88e639x_sgmii_pcs_ops;
565 mpcs->sgmii_pcs.neg_mode = true;
566 mpcs->xg_pcs.ops = &mv88e6390_xg_pcs_ops;
567 mpcs->xg_pcs.neg_mode = true;
571 mpcs->erratum_3_14 = true;
573 err = mv88e639x_pcs_setup_irq(mpcs, chip, port);
581 err = mv88e6390_pcs_enable_checker(mpcs);
585 chip->ports[port].pcs_private = mpcs;
590 kfree(mpcs);
602 static int mv88e6393x_power_lane(struct mv88e639x_pcs *mpcs, bool enable)
607 return mv88e639x_modify(mpcs, MV88E6393X_SERDES_CTRL1, val,
619 static int mv88e6393x_erratum_4_6(struct mv88e639x_pcs *mpcs)
623 err = mv88e639x_modify(mpcs, MV88E6393X_SERDES_POC,
630 err = mv88e639x_modify(mpcs, MV88E6390_SGMII_BMCR,
635 err = mv88e639x_sgmii_pcs_control_pwr(mpcs, false);
639 return mv88e6393x_power_lane(mpcs, false);
648 static int mv88e6393x_erratum_4_8(struct mv88e639x_pcs *mpcs)
653 err = mv88e639x_read(mpcs, MV88E6393X_SERDES_POC, &poc);
665 return mv88e639x_modify(mpcs, MV88E6393X_ERRATA_4_8_REG,
674 static int mv88e6393x_erratum_5_2(struct mv88e639x_pcs *mpcs)
691 err = mdiodev_c45_modify(&mpcs->mdio, fixes[i].dev,
715 static int mv88e6393x_fix_2500basex_an(struct mv88e639x_pcs *mpcs, bool on)
728 err = mv88e639x_modify(mpcs, MV88E6393X_SERDES_POC,
735 return mdiodev_c45_write(&mpcs->mdio, MDIO_MMD_VEND1, 0x8000, 0x58);
738 static int mv88e6393x_sgmii_apply_2500basex_an(struct mv88e639x_pcs *mpcs,
747 err = mv88e6393x_fix_2500basex_an(mpcs, enable);
749 dev_err(mpcs->mdio.dev.parent,
758 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
761 mv88e6393x_power_lane(mpcs, false);
762 mv88e6393x_sgmii_apply_2500basex_an(mpcs, mpcs->interface, false);
768 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
771 mv88e6393x_power_lane(mpcs, false);
772 mv88e6393x_sgmii_apply_2500basex_an(mpcs, mpcs->interface, false);
778 struct mv88e639x_pcs *mpcs = sgmii_pcs_to_mv88e639x_pcs(pcs);
781 err = mv88e6393x_erratum_4_8(mpcs);
785 err = mv88e6393x_sgmii_apply_2500basex_an(mpcs, interface, true);
789 err = mv88e6393x_power_lane(mpcs, true);
807 static irqreturn_t mv88e6393x_xg_handle_irq(struct mv88e639x_pcs *mpcs)
813 err = mv88e639x_read(mpcs, MV88E6393X_10G_INT_STATUS, &int_status);
818 err = mv88e639x_read(mpcs, MV88E6390_10G_STAT1, &stat1);
824 phylink_pcs_change(&mpcs->xg_pcs, !link_down);
832 static int mv88e6393x_xg_control_irq(struct mv88e639x_pcs *mpcs, bool enable)
839 return mv88e639x_modify(mpcs, MV88E6393X_10G_INT_ENABLE,
845 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
847 mpcs->handle_irq = mv88e6393x_xg_handle_irq;
849 return mv88e6393x_xg_control_irq(mpcs, !!mpcs->irq);
854 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
856 mv88e6393x_xg_control_irq(mpcs, false);
857 mv88e639x_xg_pcs_disable(mpcs);
858 mv88e6393x_power_lane(mpcs, false);
865 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
867 mv88e639x_xg_pcs_disable(mpcs);
868 mv88e6393x_power_lane(mpcs, false);
874 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
879 err = mv88e6393x_erratum_5_2(mpcs);
884 err = mv88e6393x_power_lane(mpcs, true);
888 return mv88e639x_xg_pcs_enable(mpcs);
894 struct mv88e639x_pcs *mpcs = xg_pcs_to_mv88e639x_pcs(pcs);
903 err = mv88e639x_read(mpcs, MV88E6390_USXGMII_PHY_STATUS, &status);
904 err = err ? : mv88e639x_read(mpcs, MV88E6390_USXGMII_LP_STATUS, &lp_status);
906 dev_err(mpcs->mdio.dev.parent,
927 struct mv88e639x_pcs *mpcs;
939 mpcs = mv88e639x_pcs_alloc(dev, bus, lane, port);
940 if (!mpcs)
943 mpcs->sgmii_pcs.ops = &mv88e6393x_sgmii_pcs_ops;
944 mpcs->sgmii_pcs.neg_mode = true;
945 mpcs->xg_pcs.ops = &mv88e6393x_xg_pcs_ops;
946 mpcs->xg_pcs.neg_mode = true;
947 mpcs->supports_5g = true;
949 err = mv88e6393x_erratum_4_6(mpcs);
953 err = mv88e639x_pcs_setup_irq(mpcs, chip, port);
957 chip->ports[port].pcs_private = mpcs;
962 kfree(mpcs);