Lines Matching refs:mpcs
29 bool (*link_check)(struct marvell_c22_pcs *mpcs);
38 static int marvell_c22_pcs_set_fiber_page(struct marvell_c22_pcs *mpcs)
43 mutex_lock(&mpcs->mdio.bus->mdio_lock);
45 err = __mdiodev_read(&mpcs->mdio, MII_MARVELL_PHY_PAGE);
47 dev_err(mpcs->mdio.dev.parent,
49 mpcs->name, ERR_PTR(err));
55 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,
58 dev_err(mpcs->mdio.dev.parent,
60 mpcs->name, ERR_PTR(err));
67 static int marvell_c22_pcs_restore_page(struct marvell_c22_pcs *mpcs,
73 err = __mdiodev_write(&mpcs->mdio, MII_MARVELL_PHY_PAGE,
76 dev_err(mpcs->mdio.dev.parent,
78 mpcs->name, ERR_PTR(err));
84 mutex_unlock(&mpcs->mdio.bus->mdio_lock);
91 struct marvell_c22_pcs *mpcs = dev_id;
95 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
99 err = __mdiodev_read(&mpcs->mdio, MII_M1011_IEVENT);
101 phylink_pcs_change(&mpcs->phylink_pcs, true);
106 marvell_c22_pcs_restore_page(mpcs, oldpage, 0);
111 static int marvell_c22_pcs_modify(struct marvell_c22_pcs *mpcs, u8 reg,
116 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
118 err = __mdiodev_modify(&mpcs->mdio, reg, mask, val);
120 return marvell_c22_pcs_restore_page(mpcs, oldpage, err);
123 static int marvell_c22_pcs_power(struct marvell_c22_pcs *mpcs,
128 return marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_PDOWN, val);
131 static int marvell_c22_pcs_control_irq(struct marvell_c22_pcs *mpcs,
136 return marvell_c22_pcs_modify(mpcs, MII_M1011_IMASK,
142 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
145 err = marvell_c22_pcs_power(mpcs, true);
149 return marvell_c22_pcs_control_irq(mpcs, !!mpcs->irq);
154 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
156 marvell_c22_pcs_control_irq(mpcs, false);
157 marvell_c22_pcs_power(mpcs, false);
163 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
168 if (mpcs->link_check && !mpcs->link_check(mpcs))
171 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
173 bmsr = __mdiodev_read(&mpcs->mdio, MII_BMSR);
174 lpa = __mdiodev_read(&mpcs->mdio, MII_LPA);
175 status = __mdiodev_read(&mpcs->mdio, MII_M1011_PHY_STATUS);
178 if (marvell_c22_pcs_restore_page(mpcs, oldpage, 0) >= 0 &&
180 mv88e6xxx_pcs_decode_state(mpcs->mdio.dev.parent, bmsr, lpa,
190 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
200 oldpage = marvell_c22_pcs_set_fiber_page(mpcs);
204 err = __mdiodev_modify_changed(&mpcs->mdio, MII_ADVERTISE, 0xffff, adv);
209 err = __mdiodev_modify_changed(&mpcs->mdio, MII_BMCR, BMCR_ANENABLE,
223 return marvell_c22_pcs_restore_page(mpcs, oldpage, ret);
228 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
230 marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_ANRESTART, BMCR_ANRESTART);
237 struct marvell_c22_pcs *mpcs = pcs_to_marvell_c22_pcs(pcs);
246 err = marvell_c22_pcs_modify(mpcs, MII_BMCR, BMCR_SPEED100 |
249 dev_err(mpcs->mdio.dev.parent,
250 "%s: failed to configure mpcs: %pe\n", mpcs->name,
267 struct marvell_c22_pcs *mpcs;
269 mpcs = kzalloc(sizeof(*mpcs), GFP_KERNEL);
270 if (!mpcs)
273 mpcs->mdio.dev.parent = dev;
274 mpcs->mdio.bus = bus;
275 mpcs->mdio.addr = addr;
276 mpcs->phylink_pcs.ops = &marvell_c22_pcs_ops;
277 mpcs->phylink_pcs.neg_mode = true;
279 return mpcs;
282 static int marvell_c22_pcs_setup_irq(struct marvell_c22_pcs *mpcs,
287 mpcs->phylink_pcs.poll = !irq;
288 mpcs->irq = irq;
293 IRQF_ONESHOT, mpcs->name, mpcs);
303 static bool mv88e6352_pcs_link_check(struct marvell_c22_pcs *mpcs)
305 struct mv88e6xxx_port *port = mpcs->port;
310 * associated with the mpcs.
323 struct marvell_c22_pcs *mpcs;
339 mpcs = marvell_c22_pcs_alloc(dev, bus, MV88E6352_ADDR_SERDES);
340 if (!mpcs)
343 snprintf(mpcs->name, sizeof(mpcs->name),
346 mpcs->link_check = mv88e6352_pcs_link_check;
347 mpcs->port = &chip->ports[port];
349 err = marvell_c22_pcs_setup_irq(mpcs, irq);
351 kfree(mpcs);
355 chip->ports[port].pcs_private = &mpcs->phylink_pcs;
362 struct marvell_c22_pcs *mpcs;
369 mpcs = pcs_to_marvell_c22_pcs(pcs);
371 if (mpcs->irq)
372 free_irq(mpcs->irq, mpcs);
374 kfree(mpcs);