Lines Matching defs:port
41 #include "port.h"
417 int port, phy_interface_t interface)
422 err = chip->info->ops->port_set_rgmii_delay(chip, port,
429 err = chip->info->ops->port_set_cmode(chip, port,
438 static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,
448 err = chip->info->ops->port_set_link(chip, port, LINK_FORCED_DOWN);
453 err = chip->info->ops->port_set_speed_duplex(chip, port,
460 err = chip->info->ops->port_set_pause(chip, port, pause);
465 err = mv88e6xxx_port_config_interface(chip, port, mode);
467 if (chip->info->ops->port_set_link(chip, port, link))
468 dev_err(chip->dev, "p%d: failed to restore MAC's link\n", port);
473 static int mv88e6xxx_phy_is_internal(struct mv88e6xxx_chip *chip, int port)
475 return port >= chip->info->internal_phys_offset &&
476 port < chip->info->num_internal_phys +
480 static int mv88e6xxx_port_ppu_updates(struct mv88e6xxx_chip *chip, int port)
486 * report whether the port is internal.
489 return mv88e6xxx_phy_is_internal(chip, port);
491 err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, ®);
494 "p%d: %s: failed to read port status\n",
495 port, __func__);
512 static void mv88e6095_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
515 u8 cmode = chip->ports[port].cmode;
519 if (mv88e6xxx_phy_is_internal(chip, port)) {
531 static void mv88e6185_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
534 u8 cmode = chip->ports[port].cmode;
569 static void mv88e6250_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
575 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
580 static void mv88e6351_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
586 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
622 static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
629 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
635 if (port == 4) {
636 err = mv88e6352_g2_scratch_port_has_serdes(chip, port);
639 port);
646 port);
652 static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
658 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
664 /* The C_Mode field is programmable on port 5 */
665 if (port == 5) {
674 static void mv88e6390_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
680 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
687 if (port == 9 || port == 10) {
696 static void mv88e6390x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
701 mv88e6390_phylink_get_caps(chip, port, config);
706 * Port 2 can also support 1000BASE-X in automedia mode if port 9 is
708 * Port 3-4 can also support 1000BASE-X in automedia mode if port 9 is
711 * Port 5 can also support 1000BASE-X in automedia mode if port 10 is
713 * Port 6-7 can also support 1000BASE-X in automedia mode if port 10 is
719 if (port >= 2 && port <= 7)
723 if (port == 9 || port == 10) {
731 static void mv88e6393x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
740 mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
746 if (port == 0 || port == 9 || port == 10) {
750 /* 6191X supports >1G modes only on port 10 */
751 if (!is_6191x || port == 10) {
766 if (port == 0) {
775 static void mv88e6xxx_get_caps(struct dsa_switch *ds, int port,
781 chip->info->ops->phylink_get_caps(chip, port, config);
784 if (mv88e6xxx_phy_is_internal(chip, port)) {
794 int port,
801 pcs = chip->info->ops->pcs_ops->pcs_select(chip, port,
807 static int mv88e6xxx_mac_prepare(struct dsa_switch *ds, int port,
818 chip->ports[port].interface != interface &&
821 err = chip->info->ops->port_set_link(chip, port,
829 static void mv88e6xxx_mac_config(struct dsa_switch *ds, int port,
838 if (mode != MLO_AN_PHY || !mv88e6xxx_phy_is_internal(chip, port)) {
839 err = mv88e6xxx_port_config_interface(chip, port,
849 dev_err(ds->dev, "p%d: failed to configure MAC/PCS\n", port);
852 static int mv88e6xxx_mac_finish(struct dsa_switch *ds, int port,
868 chip->ports[port].interface != interface) ||
869 (mode == MLO_AN_PHY && mv88e6xxx_port_ppu_updates(chip, port))))
870 err = chip->info->ops->port_set_link(chip, port, LINK_UNFORCED);
874 chip->ports[port].interface = interface;
879 static void mv88e6xxx_mac_link_down(struct dsa_switch *ds, int port,
890 /* Force the link down if we know the port may not be automatically
893 if ((!mv88e6xxx_port_ppu_updates(chip, port) ||
895 err = ops->port_sync_link(chip, port, mode, false);
898 err = ops->port_set_speed_duplex(chip, port, SPEED_UNFORCED,
904 "p%d: failed to force MAC link down\n", port);
907 static void mv88e6xxx_mac_link_up(struct dsa_switch *ds, int port,
920 /* Configure and force the link up if we know that the port may not
924 if (!mv88e6xxx_port_ppu_updates(chip, port) ||
927 err = ops->port_set_speed_duplex(chip, port,
934 err = ops->port_sync_link(chip, port, mode, true);
941 "p%d: failed to configure MAC link up\n", port);
944 static int mv88e6xxx_stats_snapshot(struct mv88e6xxx_chip *chip, int port)
949 return chip->info->ops->stats_snapshot(chip, port);
1016 int port, u16 bank1_select,
1027 err = mv88e6xxx_port_read(chip, port, s->reg, ®);
1033 err = mv88e6xxx_port_read(chip, port, s->reg + 1, ®);
1111 static void mv88e6xxx_get_strings(struct dsa_switch *ds, int port,
1127 count = chip->info->ops->serdes_get_strings(chip, port, data);
1167 static int mv88e6xxx_get_sset_count(struct dsa_switch *ds, int port, int sset)
1184 port);
1198 static int mv88e6xxx_stats_get_stats(struct mv88e6xxx_chip *chip, int port,
1209 data[j] = _mv88e6xxx_get_ethtool_stat(chip, stat, port,
1220 static int mv88e6095_stats_get_stats(struct mv88e6xxx_chip *chip, int port,
1223 return mv88e6xxx_stats_get_stats(chip, port, data,
1228 static int mv88e6250_stats_get_stats(struct mv88e6xxx_chip *chip, int port,
1231 return mv88e6xxx_stats_get_stats(chip, port, data, STATS_TYPE_BANK0,
1235 static int mv88e6320_stats_get_stats(struct mv88e6xxx_chip *chip, int port,
1238 return mv88e6xxx_stats_get_stats(chip, port, data,
1244 static int mv88e6390_stats_get_stats(struct mv88e6xxx_chip *chip, int port,
1247 return mv88e6xxx_stats_get_stats(chip, port, data,
1253 static void mv88e6xxx_atu_vtu_get_stats(struct mv88e6xxx_chip *chip, int port,
1256 *data++ = chip->ports[port].atu_member_violation;
1257 *data++ = chip->ports[port].atu_miss_violation;
1258 *data++ = chip->ports[port].atu_full_violation;
1259 *data++ = chip->ports[port].vtu_member_violation;
1260 *data++ = chip->ports[port].vtu_miss_violation;
1263 static void mv88e6xxx_get_stats(struct mv88e6xxx_chip *chip, int port,
1269 count = chip->info->ops->stats_get_stats(chip, port, data);
1274 count = chip->info->ops->serdes_get_stats(chip, port, data);
1277 mv88e6xxx_atu_vtu_get_stats(chip, port, data);
1281 static void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds, int port,
1289 ret = mv88e6xxx_stats_snapshot(chip, port);
1295 mv88e6xxx_get_stats(chip, port, data);
1299 static int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port)
1306 len += chip->info->ops->serdes_get_regs_len(chip, port);
1311 static void mv88e6xxx_get_regs(struct dsa_switch *ds, int port,
1328 err = mv88e6xxx_port_read(chip, port, i, ®);
1334 chip->info->ops->serdes_get_regs(chip, port, &p[i]);
1339 static int mv88e6xxx_get_mac_eee(struct dsa_switch *ds, int port,
1342 /* Nothing to do on the port's MAC */
1346 static int mv88e6xxx_set_mac_eee(struct dsa_switch *ds, int port,
1349 /* Nothing to do on the port's MAC */
1353 /* Mask of the local ports allowed to receive frames from a given fabric port */
1354 static u16 mv88e6xxx_port_vlan(struct mv88e6xxx_chip *chip, int dev, int port)
1365 if (dp->ds->index == dev && dp->index == port) {
1366 /* dp might be a DSA link or a user port, so it
1394 /* Frames from DSA links and CPU ports can egress any local port */
1401 * upstream port.
1419 static int mv88e6xxx_port_vlan_map(struct mv88e6xxx_chip *chip, int port)
1421 u16 output_ports = mv88e6xxx_port_vlan(chip, chip->ds->index, port);
1423 /* prevent frames from going back out of the port they came in on */
1424 output_ports &= ~BIT(port);
1426 return mv88e6xxx_port_set_vlan_map(chip, port, output_ports);
1429 static void mv88e6xxx_port_stp_state_set(struct dsa_switch *ds, int port,
1436 err = mv88e6xxx_port_set_state(chip, port, state);
1440 dev_err(ds->dev, "p%d: failed to update state\n", port);
1465 int target, port;
1471 /* Initialize the routing port to the 32 possible target devices */
1473 port = dsa_routing_port(ds, target);
1474 if (port == ds->num_ports)
1475 port = 0x1f;
1477 err = mv88e6xxx_g2_device_mapping_write(chip, target, port);
1483 port = MV88E6XXX_CASCADE_PORT_MULTIPLE;
1484 err = chip->info->ops->set_cascade_port(chip, port);
1538 * Control are precisely those whose port registers have a
1553 int port;
1559 for (port = 0; port < mv88e6xxx_num_ports(chip); port++) {
1560 /* Disable ingress rate limiting by resetting all per port
1563 err = chip->info->ops->irl_init_all(chip, port);
1584 static int mv88e6xxx_pvt_map(struct mv88e6xxx_chip *chip, int dev, int port)
1594 /* Skip the local source device, which uses in-chip port VLAN */
1596 pvlan = mv88e6xxx_port_vlan(chip, dev, port);
1599 dp = ds ? dsa_to_port(ds, port) : NULL;
1603 * source port, we must translate dev/port to
1605 * the LAG ID (one-based) as the port number
1609 port = dsa_port_lag_id_get(dp) - 1;
1613 return mv88e6xxx_g2_pvt_write(chip, dev, port, pvlan);
1618 int dev, port;
1632 for (port = 0; port < MV88E6XXX_MAX_PVT_PORTS; ++port) {
1633 err = mv88e6xxx_pvt_map(chip, dev, port);
1642 static int mv88e6xxx_port_fast_age_fid(struct mv88e6xxx_chip *chip, int port,
1645 if (dsa_to_port(chip->ds, port)->lag)
1652 return mv88e6xxx_g1_atu_remove(chip, fid, port, false);
1655 static void mv88e6xxx_port_fast_age(struct dsa_switch *ds, int port)
1661 err = mv88e6xxx_port_fast_age_fid(chip, port, 0);
1666 port, err);
1794 * a VLAN upper on a port that is also part of a VLAN
1887 * a STU state of disabled means to go by the port-global
1888 * state. So we set all user port's initial state to blocking,
1909 static int mv88e6xxx_port_mst_state_set(struct dsa_switch *ds, int port,
1912 struct dsa_port *dp = dsa_to_port(ds, port);
1940 if (mst->stu.state[port] == state)
1943 mst->stu.state[port] = state;
1954 static int mv88e6xxx_port_check_hw_vlan(struct dsa_switch *ds, int port,
1957 struct dsa_port *dp = dsa_to_port(ds, port), *other_dp;
1987 dev_err(ds->dev, "p%d: hw VLAN %d already used by port %d in %s\n",
1988 port, vlan.vid, other_dp->index, netdev_name(other_br));
1995 static int mv88e6xxx_port_commit_pvid(struct mv88e6xxx_chip *chip, int port)
1997 struct dsa_port *dp = dsa_to_port(chip->ds, port);
1999 struct mv88e6xxx_port *p = &chip->ports[port];
2013 err = mv88e6xxx_port_set_pvid(chip, port, pvid);
2017 return mv88e6xxx_port_drop_untagged(chip, port, drop_untagged);
2020 static int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port,
2034 err = mv88e6xxx_port_set_8021q_mode(chip, port, mode);
2038 err = mv88e6xxx_port_commit_pvid(chip, port);
2049 mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port,
2058 /* If the requested port doesn't belong to the same bridge as the VLAN
2062 err = mv88e6xxx_port_check_hw_vlan(ds, port, vlan->vid);
2068 static int mv88e6xxx_port_db_load_purge(struct mv88e6xxx_chip *chip, int port,
2077 /* Ports have two private address databases: one for when the port is
2078 * standalone and one for when the port is under a bridge and the
2079 * 802.1Q mode is disabled. When the port is standalone, DSA wants its
2081 * into a standalone port's database. Therefore, translate the null
2082 * VLAN ID into the port's database used for VLAN-unaware bridging.
2112 /* Purge the ATU entry only if no port is using it anymore */
2114 entry.portvec &= ~BIT(port);
2119 entry.portvec = BIT(port);
2121 entry.portvec |= BIT(port);
2129 static int mv88e6xxx_policy_apply(struct mv88e6xxx_chip *chip, int port,
2147 state = 0; /* Dissociate the port and address */
2157 err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid,
2166 /* Skip the port's policy clearing if the mapping is still in use */
2169 if (policy->port == port &&
2174 return chip->info->ops->port_set_policy(chip, port, mapping, action);
2177 static int mv88e6xxx_policy_insert(struct mv88e6xxx_chip *chip, int port,
2224 if (policy->port == port && policy->mapping == mapping &&
2246 policy->port = port;
2249 err = mv88e6xxx_policy_apply(chip, port, policy);
2259 static int mv88e6xxx_get_rxnfc(struct dsa_switch *ds, int port,
2276 if (policy->port == port)
2292 if (policy->port == port)
2306 static int mv88e6xxx_set_rxnfc(struct dsa_switch *ds, int port,
2318 err = mv88e6xxx_policy_insert(chip, port, fs);
2325 err = mv88e6xxx_policy_apply(chip, port, policy);
2339 static int mv88e6xxx_port_add_broadcast(struct mv88e6xxx_chip *chip, int port,
2347 return mv88e6xxx_port_db_load_purge(chip, port, broadcast, vid, state);
2352 int port;
2355 for (port = 0; port < mv88e6xxx_num_ports(chip); port++) {
2356 struct dsa_port *dp = dsa_to_port(chip->ds, port);
2359 if (dsa_is_unused_port(chip->ds, port))
2369 err = mv88e6xxx_port_add_broadcast(chip, port, vid);
2378 int port;
2398 return mv88e6xxx_port_db_load_purge(chip, ctx->port, broadcast,
2402 static int mv88e6xxx_port_broadcast_sync(struct mv88e6xxx_chip *chip, int port,
2406 .port = port,
2414 /* Update the port's private database... */
2424 static int mv88e6xxx_port_vlan_join(struct mv88e6xxx_chip *chip, int port,
2446 if (i == port)
2461 } else if (vlan.member[port] != member) {
2462 vlan.member[port] = member;
2469 port, vid);
2475 static int mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port,
2482 struct mv88e6xxx_port *p = &chip->ports[port];
2490 err = mv88e6xxx_port_vlan_prepare(ds, port, vlan);
2494 if (dsa_is_dsa_port(ds, port) || dsa_is_cpu_port(ds, port))
2501 /* net/dsa/slave.c will call dsa_port_vlan_add() for the affected port
2502 * and then the CPU port. Do not warn for duplicates for the CPU port.
2504 warn = !dsa_is_cpu_port(ds, port) && !dsa_is_dsa_port(ds, port);
2508 err = mv88e6xxx_port_vlan_join(chip, port, vlan->vid, member, warn);
2510 dev_err(ds->dev, "p%d: failed to add VLAN %d%c\n", port,
2519 err = mv88e6xxx_port_commit_pvid(chip, port);
2526 err = mv88e6xxx_port_commit_pvid(chip, port);
2538 int port, u16 vid)
2550 /* If the VLAN doesn't exist in hardware or the port isn't a member,
2554 vlan.member[port] == MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER)
2557 vlan.member[port] = MV88E6XXX_G1_VTU_DATA_MEMBER_TAG_NON_MEMBER;
2579 return mv88e6xxx_g1_atu_remove(chip, vlan.fid, port, false);
2582 static int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port,
2586 struct mv88e6xxx_port *p = &chip->ports[port];
2602 err = mv88e6xxx_port_get_pvid(chip, port, &pvid);
2606 err = mv88e6xxx_port_vlan_leave(chip, port, vlan->vid);
2613 err = mv88e6xxx_port_commit_pvid(chip, port);
2624 static int mv88e6xxx_port_vlan_fast_age(struct dsa_switch *ds, int port, u16 vid)
2636 err = mv88e6xxx_port_fast_age_fid(chip, port, vlan.fid);
2690 static int mv88e6xxx_port_fdb_add(struct dsa_switch *ds, int port,
2698 err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid,
2705 static int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,
2713 err = mv88e6xxx_port_db_load_purge(chip, port, addr, vid, 0);
2720 u16 fid, u16 vid, int port,
2738 if (addr.trunk || (addr.portvec & BIT(port)) == 0)
2755 int port;
2767 ctx->port, ctx->cb, ctx->data);
2770 static int mv88e6xxx_port_db_dump(struct mv88e6xxx_chip *chip, int port,
2774 .port = port,
2781 /* Dump port's default Filtering Information Database (VLAN ID 0) */
2782 err = mv88e6xxx_port_get_fid(chip, port, &fid);
2786 err = mv88e6xxx_port_db_dump_fid(chip, fid, 0, port, cb, data);
2793 static int mv88e6xxx_port_fdb_dump(struct dsa_switch *ds, int port,
2800 err = mv88e6xxx_port_db_dump(chip, port, cb, data);
2838 /* Treat the software bridge as a virtual single-port switch behind the
2851 static int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port,
2865 err = mv88e6xxx_port_set_map_da(chip, port, true);
2869 err = mv88e6xxx_port_commit_pvid(chip, port);
2887 static void mv88e6xxx_port_bridge_leave(struct dsa_switch *ds, int port,
2900 mv88e6xxx_port_vlan_map(chip, port))
2903 err = mv88e6xxx_port_set_map_da(chip, port, false);
2906 "port %d failed to restore map-DA: %pe\n",
2907 port, ERR_PTR(err));
2909 err = mv88e6xxx_port_commit_pvid(chip, port);
2912 "port %d failed to restore standalone pvid: %pe\n",
2913 port, ERR_PTR(err));
2920 int port, struct dsa_bridge bridge,
2930 err = mv88e6xxx_pvt_map(chip, sw_index, port);
2939 int port, struct dsa_bridge bridge)
2947 if (mv88e6xxx_pvt_map(chip, sw_index, port) ||
3018 static int mv88e6xxx_set_port_mode(struct mv88e6xxx_chip *chip, int port,
3027 err = mv88e6xxx_port_set_egress_mode(chip, port, egress);
3031 err = chip->info->ops->port_set_frame_mode(chip, port, frame);
3036 return chip->info->ops->port_set_ether_type(chip, port, etype);
3041 static int mv88e6xxx_set_port_mode_normal(struct mv88e6xxx_chip *chip, int port)
3043 return mv88e6xxx_set_port_mode(chip, port, MV88E6XXX_FRAME_MODE_NORMAL,
3048 static int mv88e6xxx_set_port_mode_dsa(struct mv88e6xxx_chip *chip, int port)
3050 return mv88e6xxx_set_port_mode(chip, port, MV88E6XXX_FRAME_MODE_DSA,
3055 static int mv88e6xxx_set_port_mode_edsa(struct mv88e6xxx_chip *chip, int port)
3057 return mv88e6xxx_set_port_mode(chip, port,
3063 static int mv88e6xxx_setup_port_mode(struct mv88e6xxx_chip *chip, int port)
3065 if (dsa_is_dsa_port(chip->ds, port))
3066 return mv88e6xxx_set_port_mode_dsa(chip, port);
3068 if (dsa_is_user_port(chip->ds, port))
3069 return mv88e6xxx_set_port_mode_normal(chip, port);
3071 /* Setup CPU port mode depending on its supported tag format */
3073 return mv88e6xxx_set_port_mode_dsa(chip, port);
3076 return mv88e6xxx_set_port_mode_edsa(chip, port);
3081 static int mv88e6xxx_setup_message_port(struct mv88e6xxx_chip *chip, int port)
3083 bool message = dsa_is_dsa_port(chip->ds, port);
3085 return mv88e6xxx_port_set_message_port(chip, port, message);
3088 static int mv88e6xxx_setup_egress_floods(struct mv88e6xxx_chip *chip, int port)
3093 err = chip->info->ops->port_set_ucast_flood(chip, port, true);
3098 err = chip->info->ops->port_set_mcast_flood(chip, port, true);
3108 int port)
3115 err = chip->info->ops->set_egress_port(chip, direction, port);
3120 chip->ingress_dest_port = port;
3122 chip->egress_dest_port = port;
3127 static int mv88e6xxx_setup_upstream_port(struct mv88e6xxx_chip *chip, int port)
3133 upstream_port = dsa_upstream_port(ds, port);
3135 err = chip->info->ops->port_set_upstream_port(chip, port,
3141 if (port == upstream_port) {
3165 static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port)
3174 chip->ports[port].chip = chip;
3175 chip->ports[port].port = port;
3177 err = mv88e6xxx_port_setup_mac(chip, port, LINK_UNFORCED,
3194 * If this is the upstream port for this switch, enable
3200 * by a USER port to the CPU port to allow snooping.
3202 if (dsa_is_user_port(ds, port))
3205 err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_CTL0, reg);
3209 err = mv88e6xxx_setup_port_mode(chip, port);
3213 err = mv88e6xxx_setup_egress_floods(chip, port);
3219 * tagged or untagged frames on this port, skip destination
3221 * send a copy of all transmitted/received frames on this port
3224 err = mv88e6xxx_port_set_map_da(chip, port, !dsa_is_user_port(ds, port));
3228 err = mv88e6xxx_setup_upstream_port(chip, port);
3237 * between the incoming port and the CPU.
3239 if (dsa_is_downstream_port(ds, port) &&
3241 err = chip->info->ops->port_set_policy(chip, port,
3253 err = mv88e6xxx_port_set_8021q_mode(chip, port,
3254 dsa_is_user_port(ds, port) ?
3267 err = mv88e6xxx_port_vlan_join(chip, port, MV88E6XXX_VID_STANDALONE,
3279 * relying on their port default FID.
3281 err = mv88e6xxx_port_vlan_join(chip, port, MV88E6XXX_VID_BRIDGED,
3288 err = chip->info->ops->port_set_jumbo_size(chip, port, 10218);
3296 * match the bridge port settings. Enable learning on all
3303 if (dsa_is_user_port(ds, port))
3306 reg = 1 << port;
3308 err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR,
3314 err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_EGRESS_RATE_CTL2,
3320 err = chip->info->ops->port_pause_limit(chip, port, 0, 0);
3326 err = chip->info->ops->port_disable_learn_limit(chip, port);
3332 err = chip->info->ops->port_disable_pri_override(chip, port);
3338 err = chip->info->ops->port_tag_remap(chip, port);
3344 err = chip->info->ops->port_egress_rate_limiting(chip, port);
3350 err = chip->info->ops->port_setup_message_port(chip, port);
3356 dp = dsa_to_port(ds, port);
3364 port, tx_amp);
3372 /* Port based VLAN map: give each port the same default address
3374 * CPU and DSA port(s), and the other ports.
3376 err = mv88e6xxx_port_set_fid(chip, port, MV88E6XXX_FID_STANDALONE);
3380 err = mv88e6xxx_port_vlan_map(chip, port);
3387 return mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_DEFAULT_VLAN, 0);
3390 static int mv88e6xxx_get_max_mtu(struct dsa_switch *ds, int port)
3401 static int mv88e6xxx_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
3417 if (dsa_is_dsa_port(ds, port) || dsa_is_cpu_port(ds, port))
3422 ret = chip->info->ops->port_set_jumbo_size(chip, port, new_mtu);
3460 int port;
3464 for (port = 0; port < mv88e6xxx_num_ports(chip); port++) {
3465 err = mv88e6xxx_port_hidden_read(chip, 0xf, port, 0, &val);
3484 int port;
3491 for (port = 0; port < mv88e6xxx_num_ports(chip); port++) {
3492 err = mv88e6xxx_port_set_state(chip, port, BR_STATE_DISABLED);
3497 for (port = 0; port < mv88e6xxx_num_ports(chip); port++) {
3498 err = mv88e6xxx_port_hidden_write(chip, 0xf, port, 0, 0x01c0);
3753 /* Cache the cmode of each port. */
3780 /* Prevent the use of an invalid port. */
3782 dev_err(chip->dev, "port %d is invalid\n", i);
3890 static int mv88e6xxx_port_setup(struct dsa_switch *ds, int port)
3897 err = chip->info->ops->pcs_ops->pcs_init(chip, port);
3902 return mv88e6xxx_setup_devlink_regions_port(ds, port);
3905 static void mv88e6xxx_port_teardown(struct dsa_switch *ds, int port)
3909 mv88e6xxx_teardown_devlink_regions_port(ds, port);
3913 chip->info->ops->pcs_ops->pcs_teardown(chip, port);
5358 * CPU port, only per port CPU port which is set via
6244 /* If the mdio addr is 16 indicating the first port address of a switch
6280 int port,
6340 static int mv88e6xxx_port_mdb_add(struct dsa_switch *ds, int port,
6348 err = mv88e6xxx_port_db_load_purge(chip, port, mdb->addr, mdb->vid,
6355 static int mv88e6xxx_port_mdb_del(struct dsa_switch *ds, int port,
6363 err = mv88e6xxx_port_db_load_purge(chip, port, mdb->addr, mdb->vid, 0);
6369 static int mv88e6xxx_port_mirror_add(struct dsa_switch *ds, int port,
6390 /* Can't change egress port when other mirror is active */
6402 err = mv88e6xxx_port_set_mirror(chip, port, direction, true);
6409 static void mv88e6xxx_port_mirror_del(struct dsa_switch *ds, int port,
6420 if (mv88e6xxx_port_set_mirror(chip, port, direction, false))
6421 dev_err(ds->dev, "p%d: failed to disable mirroring\n", port);
6428 /* Reset egress port when no other mirror is active */
6431 dsa_upstream_port(ds, port)))
6432 dev_err(ds->dev, "failed to set egress port\n");
6438 static int mv88e6xxx_port_pre_bridge_flags(struct dsa_switch *ds, int port,
6460 static int mv88e6xxx_port_bridge_flags(struct dsa_switch *ds, int port,
6471 u16 pav = learning ? (1 << port) : 0;
6473 err = mv88e6xxx_port_set_assoc_vector(chip, port, pav);
6481 err = chip->info->ops->port_set_ucast_flood(chip, port,
6490 err = chip->info->ops->port_set_mcast_flood(chip, port,
6499 err = mv88e6xxx_port_broadcast_sync(chip, port, broadcast);
6507 mv88e6xxx_port_set_mab(chip, port, mab);
6513 err = mv88e6xxx_port_set_lock(chip, port, locked);
6541 /* Includes the port joining the LAG */
6577 * this LAG. This can be either a local user port, or a DSA
6578 * port if the LAG port is on a remote chip.
6589 * mapped to the column:th port in the LAG.
6591 * Example: In a LAG with three active ports, the second port
6605 static void mv88e6xxx_lag_set_port_mask(u16 *mask, int port,
6617 mask[i] |= BIT(port);
6631 /* Assume no port is a member of any LAG. */
6697 static int mv88e6xxx_port_lag_change(struct dsa_switch *ds, int port)
6708 static int mv88e6xxx_port_lag_join(struct dsa_switch *ds, int port,
6724 err = mv88e6xxx_port_set_trunk(chip, port, true, id);
6736 mv88e6xxx_port_set_trunk(chip, port, false, 0);
6742 static int mv88e6xxx_port_lag_leave(struct dsa_switch *ds, int port,
6750 err_trunk = mv88e6xxx_port_set_trunk(chip, port, false, 0);
6756 int port)
6768 int port, struct dsa_lag lag,
6784 err = mv88e6xxx_pvt_map(chip, sw_index, port);
6792 int port, struct dsa_lag lag)
6799 err_pvt = mv88e6xxx_pvt_map(chip, sw_index, port);
6888 * 5-bit port mode, which we do not support. 640k^W16 ought to
6938 int port;
6953 for (port = 0; port < DSA_MAX_PORTS; port++) {
6954 if (!(pdata->enabled_ports & (1 << port)))
6956 if (strcmp(pdata->cd.port_names[port], "cpu"))
6958 pdata->cd.netdev[port] = &pdata->netdev->dev;